<feed xmlns='http://www.w3.org/2005/Atom'>
<title>bcm63xx/u-boot/arch/x86/cpu, branch master</title>
<subtitle>Broadcom-s U-Boot</subtitle>
<id>https://git.openwrt.org/project/bcm63xx/u-boot/atom?h=master</id>
<link rel='self' href='https://git.openwrt.org/project/bcm63xx/u-boot/atom?h=master'/>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/'/>
<updated>2019-06-22T14:27:13Z</updated>
<entry>
<title>watchdog: tangier: Convert to use WDT class</title>
<updated>2019-06-22T14:27:13Z</updated>
<author>
<name>Andy Shevchenko</name>
</author>
<published>2019-06-21T10:28:08Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=c974a3d1550557f246c98480083651c0a502e7e7'/>
<id>urn:sha1:c974a3d1550557f246c98480083651c0a502e7e7</id>
<content type='text'>
Convert legacy driver to use watchdog class.

Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
</entry>
<entry>
<title>x86: coreboot: make it possible to process unhandled tags</title>
<updated>2019-05-19T08:17:33Z</updated>
<author>
<name>Christian Gmeiner</name>
</author>
<published>2019-04-17T12:42:05Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=b52e9f0cb748d2a2ae26db62072294b9cccdb86f'/>
<id>urn:sha1:b52e9f0cb748d2a2ae26db62072294b9cccdb86f</id>
<content type='text'>
coreboot makes it possible to add own entries into coreboot's
table at a per mainboard basis. As there might be some custom
ones it makes sense to provide a way to process them.

Signed-off-by: Christian Gmeiner &lt;christian.gmeiner@gmail.com&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>Fix spelling of available.</title>
<updated>2019-05-09T23:52:55Z</updated>
<author>
<name>Vagrant Cascadian</name>
</author>
<published>2019-05-03T22:28:37Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=048a92ea54355756292aa49a4cf88518a98ec37a'/>
<id>urn:sha1:048a92ea54355756292aa49a4cf88518a98ec37a</id>
<content type='text'>
Signed-off-by: Vagrant Cascadian &lt;vagrant@debian.org&gt;
</content>
</entry>
<entry>
<title>x86: Add a way to jump from TPL to SPL</title>
<updated>2019-05-08T05:02:18Z</updated>
<author>
<name>Simon Glass</name>
</author>
<published>2019-05-02T16:52:27Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=49dffb7a074e9b9d2c27a303798c0e6bc5eea3ba'/>
<id>urn:sha1:49dffb7a074e9b9d2c27a303798c0e6bc5eea3ba</id>
<content type='text'>
When TPL finishes it needs to jump to SPL with the stack set up correctly.
Add a function to handle this.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>x86: broadwell: Update PCH to work in TPL</title>
<updated>2019-05-08T05:02:18Z</updated>
<author>
<name>Simon Glass</name>
</author>
<published>2019-05-02T16:52:26Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=bfeeb8d863de070b1f9a2cf17f5e491557c5ecb5'/>
<id>urn:sha1:bfeeb8d863de070b1f9a2cf17f5e491557c5ecb5</id>
<content type='text'>
The early init should only happen once. Update the probe method to
deal with TPL, SPL and U-Boot proper.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>x86: Support TPL in Intel common code</title>
<updated>2019-05-08T05:02:16Z</updated>
<author>
<name>Simon Glass</name>
</author>
<published>2019-04-26T03:59:05Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=9fa31fc51d5f06bb54c2681c91d793f82fcc537e'/>
<id>urn:sha1:9fa31fc51d5f06bb54c2681c91d793f82fcc537e</id>
<content type='text'>
Update the Makefie rules to ensure that the correct files are built when
TPL is being used.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>x86: broadwell: Implement PCH_REQ_PMBASE_INFO</title>
<updated>2019-05-08T05:02:15Z</updated>
<author>
<name>Simon Glass</name>
</author>
<published>2019-04-26T03:59:03Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=2b36eabd8aec5107f4753715c2fb4e30cb0d6136'/>
<id>urn:sha1:2b36eabd8aec5107f4753715c2fb4e30cb0d6136</id>
<content type='text'>
Implement this ioctl() to support power off.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>x86: ivybridge: Implement PCH_REQ_PMBASE_INFO</title>
<updated>2019-05-08T05:02:15Z</updated>
<author>
<name>Simon Glass</name>
</author>
<published>2019-04-26T03:59:02Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=9ffe7cd5c421e21317d56c80c1390aba636b3ffb'/>
<id>urn:sha1:9ffe7cd5c421e21317d56c80c1390aba636b3ffb</id>
<content type='text'>
Implement this ioctl() to support power off.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>x86: Add common Intel code for SPL</title>
<updated>2019-05-08T05:02:14Z</updated>
<author>
<name>Simon Glass</name>
</author>
<published>2019-04-26T03:58:56Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=17903c06e8d4d960b6d3ae1444905e45fe99a551'/>
<id>urn:sha1:17903c06e8d4d960b6d3ae1444905e45fe99a551</id>
<content type='text'>
Add an implementation of arch_cpu_init_f() so that the x86 SPL code builds
and identifies the CPU.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>x86: broadwell: Select refcode and CPU code for SPL</title>
<updated>2019-05-08T05:02:14Z</updated>
<author>
<name>Simon Glass</name>
</author>
<published>2019-04-26T03:58:55Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=c0052b6efd462ccfd43343b1cbd3460e5e3fe0dc'/>
<id>urn:sha1:c0052b6efd462ccfd43343b1cbd3460e5e3fe0dc</id>
<content type='text'>
Allow broadwell to build for SPL and include the reference code.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
</feed>
