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<title>bcm63xx/u-boot/arch/x86/dts/Makefile, branch master</title>
<subtitle>Broadcom-s U-Boot</subtitle>
<id>https://git.openwrt.org/project/bcm63xx/u-boot/atom?h=master</id>
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<updated>2018-08-20T05:52:49Z</updated>
<entry>
<title>x86: Remove support for Advantech SOM-6896</title>
<updated>2018-08-20T05:52:49Z</updated>
<author>
<name>Bin Meng</name>
</author>
<published>2018-08-10T09:39:34Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=6e71a6ab2d9e06a275e40a8c5c8e0b29cf6bb8fb'/>
<id>urn:sha1:6e71a6ab2d9e06a275e40a8c5c8e0b29cf6bb8fb</id>
<content type='text'>
Now that we have generic coreboot payload support, remove the
dedicated support for Advantech SOM-6896.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>x86: coreboot: Add generic coreboot payload support</title>
<updated>2018-08-20T05:52:06Z</updated>
<author>
<name>Bin Meng</name>
</author>
<published>2018-08-10T09:39:33Z</published>
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<id>urn:sha1:ceeee8f7b5f10d7736840b169249e891da0f6a47</id>
<content type='text'>
Currently building U-Boot as the coreboot payload requires user
to change the build configuration for a specific board during
menuconfig process. This uses the board's native device tree
to configure the hardware. For example, the device tree provides
PCI address range for the PCI host controller and U-Boot will
re-program all PCI devices' BAR to be within this range. In order
to make sure we don't mess up the hardware, we should guarantee
the range matches what coreboot programs the chipset.

But we really should make the coreboot payload support easier.
Just like EFI payload, we can create a generic coreboot payload
for all x86 boards as well. The payload is configured to include
as many generic drivers as possible. All stuff that touches low
level initialization are not allowed as such is the coreboot's
responsibility. Platform specific drivers (like gpio, spi, etc)
are not included.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Christian Gmeiner &lt;christian.gmeiner@gmail.com&gt;
</content>
</entry>
<entry>
<title>x86: Rename efi-x86 target to efi-x86_app</title>
<updated>2018-06-17T13:16:04Z</updated>
<author>
<name>Bin Meng</name>
</author>
<published>2018-06-12T15:36:24Z</published>
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<id>urn:sha1:3ebd892fda2d07f153a14cb30e60ae707e9e4208</id>
<content type='text'>
To avoid confusion, let's rename the efi-x86 target to efi-x86_app.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: Add generic EFI payload support</title>
<updated>2018-06-17T13:16:04Z</updated>
<author>
<name>Bin Meng</name>
</author>
<published>2018-06-12T15:36:18Z</published>
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<id>urn:sha1:32151d40172870e7772b1a393935001979a01aea</id>
<content type='text'>
It is possible to create a generic EFI payload for all x86 boards.
The payload is configured to include as many generic drivers as
possible. All stuff that touches low-level initialization are not
allowed as such is the EFI BIOS's responsibility. Platform specific
drivers (like gpio, spi, etc) are not included.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>SPDX: Convert all of our single license tags to Linux Kernel style</title>
<updated>2018-05-07T13:34:12Z</updated>
<author>
<name>Tom Rini</name>
</author>
<published>2018-05-06T21:58:06Z</published>
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<id>urn:sha1:83d290c56fab2d38cd1ab4c4cc7099559c1d5046</id>
<content type='text'>
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>x86: Support Intel Cherry Hill board</title>
<updated>2017-09-16T06:57:44Z</updated>
<author>
<name>Bin Meng</name>
</author>
<published>2017-08-16T05:42:02Z</published>
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<id>urn:sha1:eb45787b396f197f2d4c3bc3556c48421528f62b</id>
<content type='text'>
This adds support to Intel Cherry Hill board, a board based on
Intel Braswell SoC. The following devices are validated:

- serial port as the serial console
- on-board Realtek 8169 ethernet controller
- SATA AHCI controller
- EMMC/SDHC controller
- USB 3.0 xHCI controller
- PCIe x1 slot with a graphics card
- ICH SPI controller with an 8MB Macronix SPI flash
- Integrated graphics device as the video console

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: Add Intel Edison board files</title>
<updated>2017-07-30T02:30:25Z</updated>
<author>
<name>Andy Shevchenko</name>
</author>
<published>2017-07-06T11:41:53Z</published>
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<id>urn:sha1:495f3774be68e44a85b7e4b4f7964f8312bd8fc8</id>
<content type='text'>
Add Intel Edison board which is using U-Boot.

The patch is based on work done by the following people (in alphabetical
order):
	Aiden Park &lt;aiden.park@intel.com&gt;
	Dukjoon Jeon &lt;dukjoon.jeon@intel.com&gt;
	eric.park &lt;eric.park@intel.com&gt;
	Fabien Chereau &lt;fabien.chereau@intel.com&gt;
	Felipe Balbi &lt;felipe.balbi@linux.intel.com&gt;
	Scott D Phillips &lt;scott.d.phillips@intel.com&gt;
	Sebastien Colleur &lt;sebastienx.colleur@intel.com&gt;
	Steve Sakoman &lt;steve.sakoman@intel.com&gt;
	Vincent Tinelli &lt;vincent.tinelli@intel.com&gt;

In case we're building for Intel Edison, we must have 4096 bytes of
zeroes in the beginning on u-boot.bin. This is done in
board/intel/edison/config.mk.

First run sets hardware_id environment variable which is read from
System Controller Unit (SCU).

Serial number (serial# environment variable) is generated based on eMMC
CID.

MAC address on USB network interface is unique to the board but kept the
same all over the time.

Set mac address from U-Boot using following scheme:
	OUI = 02:00:86
	next 3 bytes of MAC address set from eMMC serial number

This allows to have a unique mac address across reboot and flashing.

Signed-off-by: Vincent Tinelli &lt;vincent.tinelli@intel.com&gt;
Signed-off-by: Felipe Balbi &lt;felipe.balbi@linux.intel.com&gt;
Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
[bmeng: Add MAINTAINERS file for Intel Edison board]
Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>x86: Add theadorable-x86-dfi-bt700 board support</title>
<updated>2016-08-16T03:44:09Z</updated>
<author>
<name>Stefan Roese</name>
</author>
<published>2016-08-15T11:50:59Z</published>
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<id>urn:sha1:27daffe7cec26ec1462245e4e15c36d19d886221</id>
<content type='text'>
This patch adds support for the BayTrail based theadorable-x86-dfi-bt700
board which uses the DFI BT700 BayTrail Qseven SoM on a custom baseboard.
The main difference to the DFI baseboard is, that it isn't equipped
with a Super IO chip and uses the internal HS SIO UART (memory mapped
PCI based) as the console UART.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
Cc: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>x86: Add DFI BT700 BayTrail board support</title>
<updated>2016-08-16T03:44:09Z</updated>
<author>
<name>Stefan Roese</name>
</author>
<published>2016-08-15T11:50:49Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=b1ad6c696631f07b5fe109378516abcb79ded1f9'/>
<id>urn:sha1:b1ad6c696631f07b5fe109378516abcb79ded1f9</id>
<content type='text'>
This patch adds support for the DFI BayTrail BT700 QSeven SoM installed
on the DFI Q7X-151 baseboard. The baseboard is equipped with the Nuvoton
NCT6102D Super IO chip providing the UART as console.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>x86: Add Advantech SOM-DB5800/SOM-6867 support</title>
<updated>2016-07-12T05:46:01Z</updated>
<author>
<name>George McCollister</name>
</author>
<published>2016-06-21T17:07:33Z</published>
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<id>urn:sha1:215099a522dae18d4682964c6b850d12c45c98a0</id>
<content type='text'>
Add support for Advantech SOM-DB5800 with the SOM-6867 installed.
This is very similar to conga-qeval20-qa3-e3845 in that there is a
reference carrier board (SOM-DB5800) with a Baytrail based SoM (SOM-6867)
installed.

Currently supported:
 - 2x UART (From ITE EC on SOM-6867) routed to COM3/4 connectors on
   SOM-DB5800.
 - 4x USB 2.0 (EHCI)
 - Video
 - SATA
 - Ethernet
 - PCIe
 - Realtek ALC892 HD Audio
   Pad configuration for HDA_RSTB, HDA_SYNC, HDA_CLK, HDA_SDO
   HDA_SDI0 is set in DT to enable HD Audio codec.
   Pin defaults for codec pin complexs are not changed.

Not supported:
 - Winbond Super I/O (Must be disabled with jumpers on SOM-DB8500)
 - USB 3.0 (XHCI)
 - TPM

Signed-off-by: George McCollister &lt;george.mccollister@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
</feed>
