bcm63xx/u-boot/board/AndesTech, branch master

riscv: configs: AE350 will use CONFIG_OF_SEPARATE when boots from flash

2019-05-09T08:46:46Z

When AE350 boots from flash, use CONFIG_OF_SEPARATE instead of CONFIG_OF_BOARD. Also remove unused code about prior_stage_fdt_address. And modify CONFIG_SYS_FDT_BASE as flash address. Signed-off-by: Rick Chen Cc: Greentime Hu Reviewed-by: Bin Meng Reviewed-by: Lukas Auer

riscv: configs: Support AE350 SMP booting from flash flow

2019-05-09T08:46:46Z

Add two defconfigs to support AE350 SMP booting from flash. Signed-off-by: Rick Chen Cc: Greentime Hu Reviewed-by: Bin Meng Reviewed-by: Lukas Auer

riscv: ae350: enable SMP

2019-04-08T01:45:08Z

Signed-off-by: Rick Chen Cc: Greentime Hu Reviewed-by: Bin Meng Reviewed-by: Lukas Auer

riscv: configs: Rename ax25-ae350 defconfig

2018-12-18T05:25:55Z

Remove cpu name from the defconfig naming. Because other cpus maybe run on AE350 platform. So only use platfrom name in defconfig naming will be better. Also sync MAINTAINERS: Rename a25-ae350_32_defconfig as ae350_rv32_defconfig ax25-ae350_64_defconfig as ae350_rv64_defconfig Signed-off-by: Rick Chen Cc: Greentime Hu Reviewed-by: Bin Meng

riscv: ax25: Hide the ax25-specific Kconfig option

2018-12-18T01:56:26Z

There is no need to expose RISCV_NDS to the Kconfig menu as it is an ax25-specific option. Introduce a dedicated Kconfig option for the cache ops of ax25 platform and use that to guard the cache ops. Signed-off-by: Bin Meng Reviewed-by: Lukas Auer Reviewed-by: Rick Chen

riscv: ax25-ae350: Pass dtb address to u-boot with a1 register

2018-12-05T06:14:16Z

ax25-ae350 use CONFIG_OF_BOARD via a2 and CONFIG_SYS_SDRAM_BASE to boot from ram which allow the board to override the fdt address originally. But after this patch riscv: save hart ID and device tree passed by prior boot stage It provide prior_stage_fdt_address which offer a temporary memory address to keep the dtb address passing from loader(gdb) to u-boot with a1. So passing via a2 and CONFIG_SYS_SDRAM_BASE is redundant and can be removed. And it also somehow may corrupted BBL if it was be arranged in CONFIG_SYS_SDRAM_BASE. In board_fdt_blob_setup() When boting from ram: prior_stage_fdt_address will be use to reserved dtb temporarily. When booting from ROM: dtb will be pre-burned in CONFIG_SYS_FDT_BASE, if it is flash base. Or CONFIG_SYS_FDT_BASE maybe a memory map space (NOT RAM or ROM) which is provided by HW. Signed-off-by: Rick Chen Cc: Greentime Hu

Merge git://git.denx.de/u-boot-riscv

2018-11-26T20:52:39Z

riscv: Remove mach type

2018-10-03T09:47:19Z

Since the mach_id is not used by RISC-V, remove it. Signed-off-by: Bin Meng Reviewed-by: Lukas Auer

board: ax25-ae350: Support cfi flash

2018-05-29T06:45:04Z

Add smc_init() to get register base from dts and deal with atfsmc020 controler initialzation job. Write protect is enabled by default. So WP shall be disabled when startup, then cfi flash can be detected and erasing and writing can be executed. Adp-ae3xx and adp-ag101p both do smc initilize job in lowlevel_init.S and get register base fron CONFIG_FTSMC020_BASE. They also can be moved those codes to board stage. Remind them as todo jobs. After that CONFIG_FTSMC020_BASE can be removed. Signed-off-by: Rick Chen Signed-off-by: Rick Chen Cc: Greentime Hu

board: nx25-ae250: Rename as ax25-ae350

2018-05-29T06:45:02Z

Rename nx25 as ax25 ae250 as ae350 nx25-ae250 as ax25-ae350 including filename, variable, string and definition. Signed-off-by: Rick Chen Signed-off-by: Rick Chen Cc: Greentime Hu