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<title>bcm63xx/u-boot/board/armltd/vexpress64, branch master</title>
<subtitle>Broadcom-s U-Boot</subtitle>
<id>https://git.openwrt.org/project/bcm63xx/u-boot/atom?h=master</id>
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<updated>2019-06-21T14:07:11Z</updated>
<entry>
<title>vexpress64: fix a typo of SPDX-License-Identifier</title>
<updated>2019-06-21T14:07:11Z</updated>
<author>
<name>Masahiro Yamada</name>
</author>
<published>2019-06-18T03:25:51Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=7700b13ce97b29419a9cfe3bcb632ecf32661b86'/>
<id>urn:sha1:7700b13ce97b29419a9cfe3bcb632ecf32661b86</id>
<content type='text'>
Misspelling of SPDX-License-Identifier is rather fatal than other
general typos, so must be fixed.

This file spells SPDX-Licence-Identifier.
                           ^

I also moved it to the very top of the file with // comment style.

Detected by grepping the source tree:

$ git grep --not -e SPDX-License-Identifier --and -e SPDX-
board/armltd/vexpress64/pcie.c: * SPDX-Licence-Identifier:      GPL-2.0+

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Acked-by: Liviu Dudau &lt;liviu.dudau@foss.arm.com&gt;
</content>
</entry>
<entry>
<title>SPDX: Convert all of our single license tags to Linux Kernel style</title>
<updated>2018-05-07T13:34:12Z</updated>
<author>
<name>Tom Rini</name>
</author>
<published>2018-05-06T21:58:06Z</published>
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<id>urn:sha1:83d290c56fab2d38cd1ab4c4cc7099559c1d5046</id>
<content type='text'>
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>dm: Use dm.h header when driver mode is used</title>
<updated>2017-06-01T12:57:52Z</updated>
<author>
<name>Simon Glass</name>
</author>
<published>2017-05-17T23:18:03Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=9d922450aa9944ecf8c249c892078cda80f40e02'/>
<id>urn:sha1:9d922450aa9944ecf8c249c892078cda80f40e02</id>
<content type='text'>
This header includes things that are needed to make driver build. Adjust
existing users to include that always, even if other dm/ includes are
present

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>board_f: Drop setup_dram_config() wrapper</title>
<updated>2017-04-05T20:36:51Z</updated>
<author>
<name>Simon Glass</name>
</author>
<published>2017-03-31T14:40:32Z</published>
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<id>urn:sha1:76b00aca4f1c13bc8f91a539e612abc70d0c692f</id>
<content type='text'>
By making dram_init_banksize() return an error code we can drop the
wrapper. Adjust this and clean up all implementations.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
</entry>
<entry>
<title>vexpress64: Juno: Change PCI buss addresses for IO to start from zero.</title>
<updated>2016-11-29T13:15:30Z</updated>
<author>
<name>Liviu Dudau</name>
</author>
<published>2016-11-22T11:19:18Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=88e0d59315f4863537a94f12ef48348764f4316b'/>
<id>urn:sha1:88e0d59315f4863537a94f12ef48348764f4316b</id>
<content type='text'>
Juno uses a 1:1 mapping between CPU and PCI addresses for IO. First,
that will trip devices that cannot use more than 16 bits of addresses
for IO, second it is un-necessary as the system can handle zero-based
PCI addresses just fine.

Change the mapping to start IO bus addresses from zero.

Signed-off-by: Liviu Dudau &lt;Liviu.Dudau@foss.arm.com&gt;
</content>
</entry>
<entry>
<title>armv8: mmu: Add support of non-identical mapping</title>
<updated>2016-07-15T16:01:43Z</updated>
<author>
<name>York Sun</name>
</author>
<published>2016-06-24T23:46:22Z</published>
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<id>urn:sha1:cd4b0c5feaaa524b44889cde8f58d4b121df8fed</id>
<content type='text'>
Introduce virtual and physical addresses in the mapping table. This change
have no impact on existing boards because they all use idential mapping.

Signed-off-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
</entry>
<entry>
<title>vexpress64: Add MMU tables</title>
<updated>2016-03-15T19:13:04Z</updated>
<author>
<name>Alexander Graf</name>
</author>
<published>2016-03-04T00:09:51Z</published>
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<id>urn:sha1:e593bf5eb36669a5f8a55271eb8c14cb4cf93961</id>
<content type='text'>
There's no good excuse for running with caches disabled on AArch64,
so let's just move the vexpress64 target to enable the MMU and run
with caches on.

Signed-off-by: Alexander Graf &lt;agraf@suse.de&gt;
</content>
</entry>
<entry>
<title>vexpress64: use 2nd DRAM bank only on juno</title>
<updated>2015-11-22T02:50:28Z</updated>
<author>
<name>Ryan Harkin</name>
</author>
<published>2015-11-18T10:39:07Z</published>
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<id>urn:sha1:2c2b218383f05be51e1bd5f5982a44b969c4b5a6</id>
<content type='text'>
This patch makes the 2nd DRAM bank available on Juno only and not on
other vexpress64 targets, eg. the FVP models.

The commit below added a 2nd bank of NOR flash for Juno, but also for
all vexpress64 targets:

    commit 2d0cee1ca2b9d977fa3214896bb2e30cfec77059
    Author: Liviu Dudau &lt;Liviu.Dudau@foss.arm.com&gt;
    Date:   Mon Oct 19 11:08:31 2015 +0100

    vexpress64: Juno: Declare all 8GB of RAM and make them visible to the kernel.

    Juno comes with 8GB RAM, but U-Boot only passes 2GB to the kernel.
    Declare a secondary memory bank and set the sizes correctly.

    Signed-off-by: Liviu Dudau &lt;Liviu.Dudau@foss.arm.com&gt;
    Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
    Reviewed-by: Ryan Harkin &lt;ryan.harkin@linaro.org&gt;
    Tested-by: Ryan Harkin &lt;ryan.harkin@linaro.org&gt;

Unfortunately, I only fully tested on Juno R0, R1 and the FVP Foundation
model.  Whilst FVP Base AEMV8 models run U-Boot OK, they fail to boot
the kernel.

Signed-off-by: Ryan Harkin &lt;ryan.harkin@linaro.org&gt;
Acked-by: Liviu Dudau &lt;liviu.dudau@foss.arm.com&gt;
Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>vexpress64: compile Juno PCIe conditionally</title>
<updated>2015-11-22T02:50:27Z</updated>
<author>
<name>Ryan Harkin</name>
</author>
<published>2015-11-18T10:39:06Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=bc8d3bc0233df4f72172ae1552c8fa55e83538f8'/>
<id>urn:sha1:bc8d3bc0233df4f72172ae1552c8fa55e83538f8</id>
<content type='text'>
Only compile in PCIe support if the board really uses it. Provide
a __weak stub for the init function if e.g. FVP is being built.

Signed-off-by: Ryan Harkin &lt;ryan.harkin@linaro.org&gt;
Acked-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>Juno: don't print PCI debug information by default</title>
<updated>2015-11-22T02:50:27Z</updated>
<author>
<name>Andre Przywara</name>
</author>
<published>2015-11-13T11:25:46Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=0ee1a22b6dbf30158718ab59f294bf1103f63121'/>
<id>urn:sha1:0ee1a22b6dbf30158718ab59f294bf1103f63121</id>
<content type='text'>
On a Juno r1 the PCI controller init routine outputs the rather boring
ATR entry information.
Do this only with DEBUG defined to avoid cluttering the user's
terminal.

Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Acked-by: Ryan Harkin &lt;ryan.harkin@linaro.org&gt;
</content>
</entry>
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