bcm63xx/u-boot/board/emulation, branch master

riscv: qemu: Enable e1000 and nvme support

2019-06-05T05:19:15Z

Since we have added the PCI support to the 'virt' target, enable e1000 and NVME as alternate network and storage devices for these virtio based devices. Signed-off-by: Bin Meng Reviewed-by: Lukas Auer Tested-by: Lukas Auer

riscv: qemu: Enable PCI host ECAM generic driver

2019-06-05T05:19:15Z

QEMU 4.0.0 'virt' target integrates a generic ECAM PCI host. Enable the driver for it. Signed-off-by: Bin Meng Reviewed-by: Lukas Auer Tested-by: Lukas Auer

riscv: qemu: Use correct SYS_TEXT_BASE for S-mode on 32bit system

2019-05-09T08:46:24Z

For 32bit system, the OpenSBI (or BBL) will jump to 0x80400000 address in S-mode whereas for 64bit system it will jump to 0x80200000 address in S-mode. Currently, the S-mode U-Boot sets SYS_TEXT_BASE to 0x80200000 for both 32bit and 64bit system. This breaks S-mode U-Boot for 32bit system. This patch sets different SYS_TEXT_BASE for 32bit and 64bit system so that S-mode U-Boot works fine for both. Signed-off-by: Anup Patel Reviewed-by: Bin Meng Reviewed-by: Lukas Auer Tested-by: Karsten Merker

riscv: qemu: enable SMP

2019-04-08T01:44:26Z

Signed-off-by: Lukas Auer Reviewed-by: Anup Patel Reviewed-by: Bin Meng Tested-by: Bin Meng

riscv: Rename cpu/qemu to cpu/generic

2019-02-27T01:12:33Z

The QEMU CPU support under arch/riscv is pretty much generic and works fine for SiFive Unleashed as well. In fact, there will be quite a few RISC-V SOCs for which QEMU CPU support will work fine. This patch renames cpu/qemu to cpu/generic to indicate the above fact. If there are SOC specific errata workarounds required in cpu/generic then those can be done at runtime in cpu/generic based on CPU vendor specific DT compatible string. Signed-off-by: Anup Patel Reviewed-by: Alexander Graf Reviewed-by: Lukas Auer Reviewed-by: Bin Meng

riscv: qemu: Imply SIFIVE_SERIAL for emulation

2018-12-18T01:56:54Z

This patch enables SiFive UART driver for QEMU RISC-V emulation by implying SIFIVE_SERIAL on BOARD_SPECIFIC_OPTIONS. Signed-off-by: Anup Patel Reviewed-by: Bin Meng Tested-by: Bin Meng

riscv: qemu: Add platform-specific Kconfig options

2018-12-18T01:56:27Z

Add the QEMU RISC-V platform-specific Kconfig options, to include CPU and timer drivers. Signed-off-by: Bin Meng Reviewed-by: Lukas Auer Reviewed-by: Anup Patel

riscv: Add S-mode defconfigs for QEMU virt machine

2018-12-05T06:14:04Z

This patch adds S-mode defconfigs for QEMU virt machine so that we can run u-boot in S-mode on QEMU using M-mode runtime firmware (BBL or equivalent). Signed-off-by: Anup Patel Reviewed-by: Bin Meng Tested-by: Bin Meng Reviewed-by: Lukas Auer

riscv: qemu: Use different SYS_TEXT_BASE for S-mode

2018-12-05T06:13:59Z

When u-boot runs in S-mode, the M-mode runtime firmware (BBL or equivalent) uses memory range in 0x80000000 to 0x80200000. Due to this, we cannot use 0x80000000 as SYS_TEXT_BASE when running in S-mode. Instead for S-mode, we use 0x80200000 as SYS_TEXT_BASE. Even Linux RISC-V kernel ignores/reserves memory range 0x80000000 to 0x80200000 because it runs in S-mode. Signed-off-by: Anup Patel Reviewed-by: Bin Meng Tested-by: Bin Meng Reviewed-by: Lukas Auer

riscv: qemu: clear kernel-start/-end in device tree as workaround for BBL

2018-11-26T05:57:33Z

QEMU specifies the location of Linux (supplied with the -kernel argument) in the device tree using the riscv,kernel-start and riscv,kernel-end properties. We currently rely on the SBI implementation of BBL to run Linux and therefore embed Linux as payload in BBL. This causes an issue, because BBL detects the kernel properties in the device tree and ignores the Linux payload as a result. Work around this issue by clearing the kernel properties in the device tree before booting Linux. Signed-off-by: Lukas Auer Reviewed-by: Bin Meng