bcm63xx/u-boot/board/terasic, branch master

SPDX: Convert all of our single license tags to Linux Kernel style

2018-05-07T13:34:12Z

When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini

arm: socfpga: add cyclone5 based de10-nano board

2017-04-25T10:46:44Z

Add support for the Terasic DE10-Nano board. The board is based on the DE0-Nano-Soc board but adds a larger FPGA and an HDMI output. Signed-off-by: Dalon Westergreen Reviewed-by: Dinh Nguyen

MAINTAINERS: socfpga: update email address for Dinh Nguyen

2016-12-06T00:45:58Z

With the acquisition of Altera by Intel, my Altera email may be going away soon. Update the contact to a more reliable address. Signed-off-by: Dinh Nguyen

socfpga: add support for Terasic DE1-SoC board

2016-12-06T00:45:56Z

Add CycloneV based Terasic DE1-SoC board. The board boots from SD/MMC. Ethernet and USB host is supported. Signed-off-by: Anatolij Gustschin Cc: Marek Vasut

arm: socfpga: sockit: Adding handoff for SDRAM ctrlcfg.extratime1

2016-10-27T06:03:12Z

Adding new handoff for SDRAM ctrcfg.extratime1 which is required for stable LPDDR2 operation. Since the board is using DDR3, the handoff is set to default value 0. Signed-off-by: Chin Liang See Cc: Marek Vasut Cc: Dinh Nguyen

arm: socfpga: de0-nano-soc: Adding handoff for SDRAM ctrlcfg.extratime1

2016-10-27T06:03:11Z

arm: socfpga: sockit: Use more relaxed DRAM timings

2016-04-10T15:19:48Z

The currently present DRAM timings generated from GHRD 14.0 did not work on SoCkit rev. D because they were too tight. Load the DRAM timings from GHRD 13.0 which are more relaxed and work with SoCkit rev. D. Signed-off-by: Marek Vasut Cc: Dinh Nguyen Cc: Chin Liang See

arm: socfpga: Drop the board boilerplate

2015-12-20T02:36:51Z

Drop all the common board code, since it is not completely useless. Signed-off-by: Marek Vasut Cc: Chin Liang See Cc: Dinh Nguyen

arm: socfpga: sockit: Probe DWC2 UDC from OF instead of hard-coded data

2015-12-20T02:36:51Z

This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled. Signed-off-by: Marek Vasut Cc: Chin Liang See Cc: Dinh Nguyen Cc: Lukasz Majewski Cc: Lukasz Majewski

arm: socfpga: sockit: Remove Micrel PHY configuration

2015-12-20T02:36:50Z

The Micrel PHY configuration is now done from OF, so hard-coding the configuration into the board file is no longer necessary. Signed-off-by: Marek Vasut Cc: Joe Hershberger Cc: Chin Liang See Cc: Dinh Nguyen