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<title>bcm63xx/u-boot/doc/README.fsl-esdhc, branch master</title>
<subtitle>Broadcom-s U-Boot</subtitle>
<id>https://git.openwrt.org/project/bcm63xx/u-boot/atom?h=master</id>
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<updated>2017-07-12T07:44:22Z</updated>
<entry>
<title>mmc: fsl_esdhc: drop CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT</title>
<updated>2017-07-12T07:44:22Z</updated>
<author>
<name>Peng Fan</name>
</author>
<published>2017-06-12T09:50:55Z</published>
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<id>urn:sha1:f34ccce50a1805a6fdb2d1604ec4e40d79302455</id>
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CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT is not the correct method
to set I/O to 1.8. To boards that does not support vqmmc-supply,
use vs18_enable in fsl_esdhc_cfg. If regulator is supported,
use fixed 1.8V regulator for vqmmc-supply.

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Cc: Jaehoon Chung &lt;jh80.chung@samsung.com&gt;
Cc: York Sun &lt;york.sun@nxp.com&gt;
Cc: Stefano Babic &lt;sbabic@denx.de&gt;
</content>
</entry>
<entry>
<title>mmc: fsl_esdhc: Add adapter card type identification support</title>
<updated>2015-05-04T16:25:19Z</updated>
<author>
<name>Yangbo Lu</name>
</author>
<published>2015-04-22T05:57:00Z</published>
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<id>urn:sha1:5a8dbdc6b4b8b4b17c807c9bb23807cdc66f6feb</id>
<content type='text'>
Add adapter card type identification support by reading
FPGA STAT_PRES1 register SDHC Card ID[0:2] bits. To use this function,
define CONFIG_FSL_ESDHC_ADAPTER_IDENT.

Signed-off-by: Yangbo Lu &lt;yangbo.lu@freescale.com&gt;
Cc: York Sun &lt;yorksun@freescale.com&gt;
Cc: Pantelis Antoniou &lt;panto@antoniou-consulting.com&gt;
[York Sun: resolve conflicts in README.fsl-esdhc]
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
</entry>
<entry>
<title>mmc: fsl_esdhc: Add support to force VSELECT set</title>
<updated>2015-02-23T08:11:42Z</updated>
<author>
<name>Otavio Salvador</name>
</author>
<published>2015-02-17T12:42:44Z</published>
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<id>urn:sha1:ee0c538951018759eff4038db75e61b1cd040307</id>
<content type='text'>
Some boards cannot do voltage negotiation but need to set the VSELECT
bit forcely to ensure it to work at 1.8V.

This commit adds CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT flag for this use.

Signed-off-by: Otavio Salvador &lt;otavio@ossystems.com.br&gt;
</content>
</entry>
<entry>
<title>esdhc: Add CONFIG_SYS_FSL_ESDHC_LE and CONFIG_SYS_FSL_ESDHC_BE macros</title>
<updated>2014-09-08T17:30:33Z</updated>
<author>
<name>Wang Huan</name>
</author>
<published>2014-09-05T05:52:39Z</published>
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<content type='text'>
For LS102xA, the processor is in little-endian mode, while esdhc IP is
in big-endian mode. CONFIG_SYS_FSL_ESDHC_LE and CONFIG_SYS_FSL_ESDHC_BE
are added. So accessing ESDHC registers can be determined by ESDHC IP's
endian mode.

Signed-off-by: Alison Wang &lt;alison.wang@freescale.com&gt;
</content>
</entry>
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