<feed xmlns='http://www.w3.org/2005/Atom'>
<title>bcm63xx/u-boot/drivers/clk/at91, branch master</title>
<subtitle>Broadcom-s U-Boot</subtitle>
<id>https://git.openwrt.org/project/bcm63xx/u-boot/atom?h=master</id>
<link rel='self' href='https://git.openwrt.org/project/bcm63xx/u-boot/atom?h=master'/>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/'/>
<updated>2019-04-12T02:10:05Z</updated>
<entry>
<title>clk: at91: replace dm_fdt_pre_reloc by dm_ofnode_pre_reloc</title>
<updated>2019-04-12T02:10:05Z</updated>
<author>
<name>Patrick Delaunay</name>
</author>
<published>2019-03-20T17:21:24Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=7bb94ab1d5cde8e0fce90e0e48729dec3683c5aa'/>
<id>urn:sha1:7bb94ab1d5cde8e0fce90e0e48729dec3683c5aa</id>
<content type='text'>
Prepare to remove dm_fdt_pre_reloc

Signed-off-by: Patrick Delaunay &lt;patrick.delaunay@st.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>clk: at91: utmi: add timeout for utmi lock</title>
<updated>2018-08-13T18:03:57Z</updated>
<author>
<name>Eugen Hristev</name>
</author>
<published>2018-08-03T09:10:49Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=e9cd3d70244a4a262c6b1935df87c85d25df5344'/>
<id>urn:sha1:e9cd3d70244a4a262c6b1935df87c85d25df5344</id>
<content type='text'>
In case the slow clock is not properly configured, the UTMI clock
cannot lock the PLL, because UPLLCOUNT will "wait X slow clock cycles".
In this case U-boot will loop indefinitely.
Added a timeout in this case, to start U-boot even if UTMI clock is
not enabled, so the user can use different media if needed, or investigate.

Signed-off-by: Eugen Hristev &lt;eugen.hristev@microchip.com&gt;
</content>
</entry>
<entry>
<title>clk: at91: clk-h32mx: replace dm_warn with dev_dbg</title>
<updated>2018-05-23T21:30:03Z</updated>
<author>
<name>Eugen Hristev</name>
</author>
<published>2018-05-09T07:58:30Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=649aa6cfe8113d9fe51ebd7d189dcf8524ee45bf'/>
<id>urn:sha1:649aa6cfe8113d9fe51ebd7d189dcf8524ee45bf</id>
<content type='text'>
dm_warn is too noisy, replace with dev_dbg for less noise.

Based on original work by Wenyou Yang

Signed-off-by: Eugen Hristev &lt;eugen.hristev@microchip.com&gt;
</content>
</entry>
<entry>
<title>SPDX: Convert all of our single license tags to Linux Kernel style</title>
<updated>2018-05-07T13:34:12Z</updated>
<author>
<name>Tom Rini</name>
</author>
<published>2018-05-06T21:58:06Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=83d290c56fab2d38cd1ab4c4cc7099559c1d5046'/>
<id>urn:sha1:83d290c56fab2d38cd1ab4c4cc7099559c1d5046</id>
<content type='text'>
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR</title>
<updated>2018-04-27T18:54:48Z</updated>
<author>
<name>Tom Rini</name>
</author>
<published>2018-04-18T17:50:47Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=d024236e5a31a2b4b82cbcc98b31b8170fc88d28'/>
<id>urn:sha1:d024236e5a31a2b4b82cbcc98b31b8170fc88d28</id>
<content type='text'>
We have a large number of places where while we historically referenced
gd in the code we no longer do, as well as cases where the code added
that line "just in case" during development and never dropped it.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>clk: at91: clk-system: add set/get_rate operations</title>
<updated>2018-03-16T11:30:04Z</updated>
<author>
<name>Wenyou Yang</name>
</author>
<published>2018-02-09T03:34:52Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=162a7de5e519eb489003124d3679039d3840435c'/>
<id>urn:sha1:162a7de5e519eb489003124d3679039d3840435c</id>
<content type='text'>
To support set/get the clock rate, add set/get_rate operations.

Signed-off-by: Wenyou Yang &lt;wenyou.yang@microchip.com&gt;
</content>
</entry>
<entry>
<title>clk: at91: add PLLADIV driver</title>
<updated>2018-03-16T11:30:04Z</updated>
<author>
<name>Wenyou Yang</name>
</author>
<published>2018-02-09T03:34:51Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=fed0509c92e0fe29d0ddc9c743719d22c95b7596'/>
<id>urn:sha1:fed0509c92e0fe29d0ddc9c743719d22c95b7596</id>
<content type='text'>
As said in the SAMA5D2 datasheet, the PLLA clock must be divided
by 2 by writing the PLLADIV2 bit in PMC_MCKR, if the ratio between
PCK and MCK is 3 (MDIV = 3). This is the purpose of the driver.

Signed-off-by: Wenyou Yang &lt;wenyou.yang@microchip.com&gt;
</content>
</entry>
<entry>
<title>clk: at91: add USB Host clock driver</title>
<updated>2018-03-16T11:30:04Z</updated>
<author>
<name>Wenyou Yang</name>
</author>
<published>2018-02-09T03:34:50Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=cb0cb1b0cf20687cf980fbd64c56224f06d566aa'/>
<id>urn:sha1:cb0cb1b0cf20687cf980fbd64c56224f06d566aa</id>
<content type='text'>
Add USB clock driver to configure the input clock and the divider
in the PMC_USB register to generate a 48MHz and a 12MHz signal to
the USB Host OHCI.

Signed-off-by: Wenyou Yang &lt;wenyou.yang@microchip.com&gt;
</content>
</entry>
<entry>
<title>clk: at91: clk-generated: fix incorrect index of clk source</title>
<updated>2017-11-30T03:30:50Z</updated>
<author>
<name>Wenyou Yang</name>
</author>
<published>2017-11-17T06:50:22Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=63a80b8d03744c48c188e6bc6f7f69813507cfdb'/>
<id>urn:sha1:63a80b8d03744c48c188e6bc6f7f69813507cfdb</id>
<content type='text'>
Differentiate the generic clock source selection value from the parent
clock index to fix the incorrect assignment of the generic clock
source selection.

Signed-off-by: Wenyou Yang &lt;wenyou.yang@microchip.com&gt;
</content>
</entry>
<entry>
<title>clk: at91: clk-generated: select absolute closest rate</title>
<updated>2017-11-30T03:30:50Z</updated>
<author>
<name>Ludovic Desroches</name>
</author>
<published>2017-11-17T06:50:21Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=eb1ed2b19befecdfeddb394e6174bb2198f2a49b'/>
<id>urn:sha1:eb1ed2b19befecdfeddb394e6174bb2198f2a49b</id>
<content type='text'>
To get the same behavior as the Linux driver, instead of selecting
the closest inferior rate, select the closest inferior or superior
rate

Signed-off-by: Ludovic Desroches &lt;ludovic.desroches@microchip.com&gt;
Signed-off-by: Wenyou Yang &lt;wenyou.yang@microchip.com&gt;
</content>
</entry>
</feed>
