<feed xmlns='http://www.w3.org/2005/Atom'>
<title>bcm63xx/u-boot/drivers/clk/rockchip, branch master</title>
<subtitle>Broadcom-s U-Boot</subtitle>
<id>https://git.openwrt.org/project/bcm63xx/u-boot/atom?h=master</id>
<link rel='self' href='https://git.openwrt.org/project/bcm63xx/u-boot/atom?h=master'/>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/'/>
<updated>2019-05-30T10:22:35Z</updated>
<entry>
<title>rockchip: clk: rk3399: allow requests for all UART clocks</title>
<updated>2019-05-30T10:22:35Z</updated>
<author>
<name>Christoph Muellner</name>
</author>
<published>2019-05-07T08:58:44Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=24615436321894867cb7d4c0bd4e6b928150c112'/>
<id>urn:sha1:24615436321894867cb7d4c0bd4e6b928150c112</id>
<content type='text'>
This patch adds the rate for UART1 and UART3 the same way
as already implemented for UART0 and UART2.

This is required for boards, which have their console output
on these UARTs.

Signed-off-by: Christoph Muellner &lt;christoph.muellner@theobroma-systems.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>rockchip: clk: rk322x: fix assert clock value</title>
<updated>2019-05-08T09:34:12Z</updated>
<author>
<name>Kever Yang</name>
</author>
<published>2019-04-02T12:41:23Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=5793e8c271f73da2ca50fa3d57d3fea7e3d2796c'/>
<id>urn:sha1:5793e8c271f73da2ca50fa3d57d3fea7e3d2796c</id>
<content type='text'>
BUS_PCLK_HZ and BUS_HCLK_HZ are from BUS_ACLK_HZ, not from GPLL_HZ.

Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>rockchip: rk322x: add CLK_EMMC_SAMPLE clock support</title>
<updated>2019-05-08T09:34:12Z</updated>
<author>
<name>Kever Yang</name>
</author>
<published>2019-04-02T12:41:22Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=e4d0d61275ac1b14375be8f62585398e05b19f3f'/>
<id>urn:sha1:e4d0d61275ac1b14375be8f62585398e05b19f3f</id>
<content type='text'>
Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>rockchip: use 'arch-rockchip' as header file path</title>
<updated>2019-04-30T22:00:05Z</updated>
<author>
<name>Kever Yang</name>
</author>
<published>2019-03-28T03:01:23Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=15f09a1a834b125ed4a6102eac96186da0641541'/>
<id>urn:sha1:15f09a1a834b125ed4a6102eac96186da0641541</id>
<content type='text'>
Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common
header file path, so that we can get the correct path directly.

Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
Reviewed-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
</content>
</entry>
<entry>
<title>rockchip: clk: Add mention of four new clocks</title>
<updated>2019-02-01T15:59:13Z</updated>
<author>
<name>Simon Glass</name>
</author>
<published>2019-01-21T21:53:30Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=5328af17742d35d50f64666c63c2824113d6903a'/>
<id>urn:sha1:5328af17742d35d50f64666c63c2824113d6903a</id>
<content type='text'>
These clocks are needed to get MMC running. We don't actually support
setting them yet.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
</content>
</entry>
<entry>
<title>rockchip: rk3288: Add i2s pinctrl and clock support</title>
<updated>2019-02-01T15:59:10Z</updated>
<author>
<name>Simon Glass</name>
</author>
<published>2018-12-28T03:15:20Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=3dbfe5ae614a561c3e0c2ccddd7cae0d4cd8f2c8'/>
<id>urn:sha1:3dbfe5ae614a561c3e0c2ccddd7cae0d4cd8f2c8</id>
<content type='text'>
Add support for setting pinctrl and clock for I2S on rk3288. This allows
the sound driver to operate. These settings were created by rkmux.py

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
</content>
</entry>
<entry>
<title>rockchip: rk3399: Initialize CPU B clock.</title>
<updated>2018-11-30T20:56:45Z</updated>
<author>
<name>Christoph Muellner</name>
</author>
<published>2018-11-30T19:32:48Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=af765a49baac1191da1cf272a19d650d313c3314'/>
<id>urn:sha1:af765a49baac1191da1cf272a19d650d313c3314</id>
<content type='text'>
This patch sets the PLL of CPU cluster B (BPLL) to 600 MHz.
This decreases the boot time of Linux 4.19 by about 8%.

The 600 MHz are inspired by the 600 MHz used for LPLL initialization
(came in with commit 9f636a249c1).

Tested on RK3399-Q7 on Haikou base board.

Signed-off-by: Christoph Muellner &lt;christoph.muellner@theobroma-systems.com&gt;
Reviewed-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
</content>
</entry>
<entry>
<title>ARM: rockchip: rv1108: Sync clock with vendor tree</title>
<updated>2018-11-30T20:56:44Z</updated>
<author>
<name>Otavio Salvador</name>
</author>
<published>2018-11-30T13:34:12Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=5d2cb15c7737e51f669f80d82ad7286d0f573097'/>
<id>urn:sha1:5d2cb15c7737e51f669f80d82ad7286d0f573097</id>
<content type='text'>
Make adjustments to the rv1108 clock driver in order to align it
with the internal Rockchip version.

Signed-off-by: Otavio Salvador &lt;otavio@ossystems.com.br&gt;
Reviewed-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
</content>
</entry>
<entry>
<title>drivers: cosmetic: Convert SPDX license tags to Linux Kernel style</title>
<updated>2018-10-28T13:26:39Z</updated>
<author>
<name>Patrick Delaunay</name>
</author>
<published>2018-10-26T07:02:52Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=22929e1266e9a61048bfaef381ad4fb2e2fc3ef5'/>
<id>urn:sha1:22929e1266e9a61048bfaef381ad4fb2e2fc3ef5</id>
<content type='text'>
Complete in the drivers directory the work started with
commit 83d290c56fab ("SPDX: Convert all of our single
license tags to Linux Kernel style").

Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Patrick Delaunay &lt;patrick.delaunay@st.com&gt;
</content>
</entry>
<entry>
<title>rockchip: clk: rk3288: handle clk_enable requests for GMAC</title>
<updated>2018-05-14T15:30:40Z</updated>
<author>
<name>Jonathan Gray</name>
</author>
<published>2018-05-08T09:49:05Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=ed1030e1523541801ae1e36bc34ee6872d474184'/>
<id>urn:sha1:ed1030e1523541801ae1e36bc34ee6872d474184</id>
<content type='text'>
Since b0ba1e7e9d9b9441a18048ec67a3b3100c096975
(rockchip: clk: rk3288: add clk_enable function and support USB HOST0/HSIC)
Ethernet no longer probes on RK3288.

Add no-ops for GMAC clocks observed to be requested which match the
clk_enable cases in RK3368 and RK3399.

Signed-off-by: Jonathan Gray &lt;jsg@jsg.id.au&gt;
Cc: Wadim Egorov &lt;w.egorov@phytec.de&gt;
Cc: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
Acked-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
Reviewed-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
</content>
</entry>
</feed>
