Broadcom-s U-Boot https://git.openwrt.org/project/bcm63xx/u-boot/atom?h=master 2019-05-05T00:02:16Z 2019-05-05T00:02:16Z Tom Rini 2019-05-05T00:02:16Z urn:sha1:c9baea6d0e96eb4bf55061d516e91e22236ed198 2019-05-04T17:04:12Z Alex Kiernan 2019-05-01T07:58:27Z urn:sha1:623de3f08631bd8aab79f38b71ada18a1f9d836f This converts the following to Kconfig: CONFIG_SUPPORT_EMMC_BOOT As requested by Michal Simek <michal.simek@xilinx.com>, these boards have no eMMC so CONFIG_SUPPORT_EMMC_BOOT has not been migrated: xilinx_zynqmp_zc1275_revB xilinx_zynqmp_zc1751_xm018_dc4 xilinx_zynqmp_zc1751_xm019_dc5 xilinx_zynqmp_zcu100_revC xilinx_zynqmp_zcu102_rev1_0 xilinx_zynqmp_zcu102_revA xilinx_zynqmp_zcu102_revB xilinx_zynqmp_zcu104_revA xilinx_zynqmp_zcu104_revC xilinx_zynqmp_zcu106_revA xilinx_zynqmp_zcu111_revA Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com> Acked-by: Lukasz Majewski <lukma@denx.de> Acked-by: Patrick Delaunay <patrick.delaunay@st.com> Acked-by: Ramon Fried <ramon.fried@gmail.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com> 2019-05-03T12:44:11Z Faiz Abbas 2019-04-16T17:36:58Z urn:sha1:37cb626da25d0d895079c85866d0c2030cd98438 The Standard Host Controller Interface (SDHCI) specification version 3.00 adds support for Advanced DMA (ADMA) for both 64 and 32 bit widths of DMA. ADMA2 uses a table of descriptors for aggregating DMA requests. This significantly improves read and write throughput. Add Support for the same. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> 2019-04-18T06:12:38Z Eugeniy Paltsev 2019-02-25T15:35:28Z urn:sha1:15736e288e0654a2c58be4b34e5502d18c9b529c Add the DM_MMC-compatible DesignWare MMC driver support for Synopsys ARC devboards. It is created to switch ARC devboards to use DM_MMC. It required information such as clocks (Bus Interface Unit clock, Card Interface Unit clock) and SDIO bus width. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> 2019-01-19T14:49:26Z Philipp Tomsich 2018-11-30T21:13:25Z urn:sha1:2acc24fc28ef782f4baef1aa0193d520ee9610b9 The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion] 2018-12-19T14:23:01Z Paul Burton 2018-12-16T22:25:20Z urn:sha1:d77271393a429ed7eb82efcd9ad4aa61cd9809d4 Add driver for the JZ47xx MSC controller. Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> Reviewed-by: Marek Vasut <marex@denx.de> 2018-11-29T04:04:54Z Weijie Gao 2018-11-15T02:08:04Z urn:sha1:d24b69395949048f26fecb351844b1d7bc27fc33 This patch adds MT7623 host controller driver for accessing SD/MMC. Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com> Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Tested-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> 2018-11-22T07:49:19Z Vasily Khoruzhick 2018-11-10T04:41:44Z urn:sha1:2a8882ecefdeb9eb7ea2ea21427460e773a00e5a Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic 2018-10-16T14:53:21Z Michal Simek 2018-08-22T12:55:27Z urn:sha1:ec48b6c991f400c8583ac2f875d65a8539f0b437 Xilinx is introducing Versal, an adaptive compute acceleration platform (ACAP), built on 7nm FinFET process technology. Versal ACAPs combine Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent Engines with leading-edge memory and interfacing technologies to deliver powerful heterogeneous acceleration for any application. The Versal AI Core series has five devices, offering 128 to 400 AI Engines. The series includes dual-core Arm Cortex™-A72 application processors, dual-core Arm Cortex-R5 real-time processors, 256KB of on-chip memory with ECC, more than 1,900 DSP engines optimized for high-precision floating point with low latency. The patch is adding necessary infrastructure in place without enabling platform which is done in separate patch. Signed-off-by: Michal Simek <michal.simek@xilinx.com> 2018-09-11T12:32:55Z Lokesh Vutla 2018-08-27T10:27:54Z urn:sha1:aaa449fb27737aea9694881a51ba7f078724d8d1 AM654 has an arasan sdhci controller and a mmc phy attached to it. Add basic support for K3 specific arasan sdhci controller. Cc: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>