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<title>bcm63xx/u-boot/drivers/mmc/uniphier-sd.c, branch master</title>
<subtitle>Broadcom-s U-Boot</subtitle>
<id>https://git.openwrt.org/project/bcm63xx/u-boot/atom?h=master</id>
<link rel='self' href='https://git.openwrt.org/project/bcm63xx/u-boot/atom?h=master'/>
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<updated>2019-02-09T10:08:40Z</updated>
<entry>
<title>mmc: tmio: Make DMA transfer end bit configurable</title>
<updated>2019-02-09T10:08:40Z</updated>
<author>
<name>Marek Vasut</name>
</author>
<published>2019-01-11T22:45:54Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=992bcf4f27794a7f578e0145ef1c933a87a1d83c'/>
<id>urn:sha1:992bcf4f27794a7f578e0145ef1c933a87a1d83c</id>
<content type='text'>
Different versions of the SDHI core use either bit 17 or bit 20 for the
DTRAEND indication, which can differ even between SoC revisions. Make
the DTRAEND bit position part of the driver private data, so that the
probe function can set this accordingly. Set this to 20 on Socionext
SoCs and either 17 or 20 on Renesas SoCs, depending on the SoC.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@gmail.com&gt;
Cc: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
</entry>
<entry>
<title>mmc: tmio: Switch to clock framework</title>
<updated>2018-12-03T11:51:16Z</updated>
<author>
<name>Marek Vasut</name>
</author>
<published>2018-06-13T06:02:55Z</published>
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<id>urn:sha1:8ec6a04b6bf641f13402506c0f1b1d9dda699b51</id>
<content type='text'>
Switch the driver to using clk_get_rate()/clk_set_rate() instead of
caching the mclk frequency in it's private data. This is required on
the SDHI variant of the controller, where the upstream mclk need to
be adjusted when using UHS modes.

Platforms which do not support clock framework or do not support it
in eg. SPL default to 100 MHz clock.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@gmail.com&gt;
Cc: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
---
V2: - Fix build on certain platforms using SPL without clock framework
V3: - Turn clk_get_rate into a callback and fill it as needed on both
      renesas and socionext platforms
</content>
</entry>
<entry>
<title>mmc: uniphier-sd: sync with Linux</title>
<updated>2018-09-11T11:37:18Z</updated>
<author>
<name>Masahiro Yamada</name>
</author>
<published>2018-09-10T03:58:35Z</published>
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<id>urn:sha1:c3ab1e118fc64b5ac49e949dab40507f6fdbbde3</id>
<content type='text'>
Sync with the driver code and the binding recently merged in Linux.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
</entry>
<entry>
<title>SPDX: Convert all of our single license tags to Linux Kernel style</title>
<updated>2018-05-07T13:34:12Z</updated>
<author>
<name>Tom Rini</name>
</author>
<published>2018-05-06T21:58:06Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=83d290c56fab2d38cd1ab4c4cc7099559c1d5046'/>
<id>urn:sha1:83d290c56fab2d38cd1ab4c4cc7099559c1d5046</id>
<content type='text'>
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>mmc: uniphier-sd: skip clock set-up for SPL</title>
<updated>2018-04-23T15:35:34Z</updated>
<author>
<name>Masahiro Yamada</name>
</author>
<published>2018-04-20T09:14:25Z</published>
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<id>urn:sha1:fc2d0302b666cd127fca3a8a800f33841de11c41</id>
<content type='text'>
The size of SPL is hitting the limit (64KB) for uniphier_v7_defconfig.
When booting from SD/eMMC, obviously its clock has been properly set up
by the boot ROM.  Acutually, no need to re-initialize the clock in SPL.

Using a clock driver would generalize the SoC specific code, but
solving the memory footprint problem would win.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
</entry>
<entry>
<title>mmc: tmio: move clk_enable() to each driver's probe function</title>
<updated>2018-04-23T15:35:34Z</updated>
<author>
<name>Masahiro Yamada</name>
</author>
<published>2018-04-20T09:14:24Z</published>
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<id>urn:sha1:30b5d9aa9aee9853b6b51d93ddf16d762d20c538</id>
<content type='text'>
I need to differentiate the clock handling for uniphier-sd.  Move it
to each driver's probe function from the tmio common code so that
renesas-sdhi will not be affected.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
</entry>
<entry>
<title>mmc: tmio: Rename Matsushita to TMIO</title>
<updated>2018-04-13T22:03:30Z</updated>
<author>
<name>Marek Vasut</name>
</author>
<published>2018-04-13T21:51:33Z</published>
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<id>urn:sha1:cb0b6b035a356e958bf964803e87539464f01bf2</id>
<content type='text'>
Synchronize the naming with Linux, call the common code TMIO.
No functional change.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@gmail.com&gt;
Cc: Jaehoon Chung &lt;jh80.chung@samsung.com&gt;
Cc: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
</entry>
<entry>
<title>mmc: uniphier: Allow passing quirks to the probe function</title>
<updated>2018-04-11T21:11:57Z</updated>
<author>
<name>Marek Vasut</name>
</author>
<published>2018-04-08T15:45:23Z</published>
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<id>urn:sha1:c769e609907ccf838801433cdb89e73972f5550b</id>
<content type='text'>
Certain instances of the SD IP require more elaborate digging
in the DT to figure out which variant of the SD IP is in use.
Allow explicit passing of the quirks into the probe function.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@gmail.com&gt;
Cc: Jaehoon Chung &lt;jh80.chung@samsung.com&gt;
Cc: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
</entry>
<entry>
<title>mmc: uniphier: Split out SoC specific bits from the driver</title>
<updated>2018-04-11T21:11:56Z</updated>
<author>
<name>Marek Vasut</name>
</author>
<published>2018-04-08T13:22:58Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=e94cad93b7f940de0eda446b0cd9a43da7a1e328'/>
<id>urn:sha1:e94cad93b7f940de0eda446b0cd9a43da7a1e328</id>
<content type='text'>
Factor out common code from the uniphier SD driver, change the prefix
of the functions from uniphier_sd_ to matsu_sd_ and create separate
renesas-sdhi.c driver. Thus far, all the code is still compiled when
CONFIG_UNIPHIER_MMC is selected and there is no functional change.
This patch is a preparation for further split of the SoC specific
parts of the Matsushita SD driver, used both on Uniphier and R-Car.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@gmail.com&gt;
Cc: Jaehoon Chung &lt;jh80.chung@samsung.com&gt;
Cc: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
</entry>
<entry>
<title>mmc: uniphier-sd: Add R8A77965 M3N entries</title>
<updated>2018-03-05T09:59:37Z</updated>
<author>
<name>Marek Vasut</name>
</author>
<published>2018-02-26T09:35:15Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=d6eb25c2f168523f4541c1e4ad5568b0999e6148'/>
<id>urn:sha1:d6eb25c2f168523f4541c1e4ad5568b0999e6148</id>
<content type='text'>
Add entries for the R8A77965 M3N SoC.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@gmail.com&gt;
Cc: Nobuhiro Iwamatsu &lt;iwamatsu@nigauri.org&gt;
Cc: Jaehoon Chung &lt;jh80.chung@samsung.com&gt;
Cc: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
</entry>
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