bcm63xx/u-boot/drivers/mmc, branch master

Merge tag 'mmc-6-19' of https://github.com/MrVan/u-boot

2019-06-20T13:13:27Z

- Avoid HS400 mode when accessing boot partitions

mmc: fsl_esdhc: fix probe issue without CONFIG_BLK enabled

2019-06-19T07:24:56Z

u-boot is trying to make CONFIG_BLK as a hard requirement for DM_MMC. But now it's still not. config BLK bool "Support block devices" depends on DM default y if DM_MMC When fsl_esdhc driver was reworked for DM_MMC support, DM_MMC without CONFIG_BLK enabled wasn't considered. This patch is to fix probe issue without CONFIG_BLK enabled. Signed-off-by: Yangbo Lu Signed-off-by: Yinbo Zhu Reviewed-by: Prabhakar Kushwaha

mmc: Avoid HS400 mode when accessing boot partitions

2019-06-19T05:53:59Z

U-Boot code currently only applies this restriction to HS200 mode, extend this to HS400 mode as well. Currently U-Boot code not support accessing boot partition in HS200/400 mode. This needs more check. Signed-off-by: Marek Vasut Cc: Jean-Jacques Hiblot Cc: Nobuhiro Iwamatsu Cc: Peng Fan Reviewed-by: Peng Fan

dm: arm: bcmstb: Enable driver model MMC support

2019-05-28T17:58:06Z

For bcm7445 and bcm7260, this patch enables CONFIG_DM_MMC and updates the bcmstb SDHCI driver to use the new driver model. This allows removal of SDHCI configuration handling from bcmstb.c, and eliminates a board removal compile warning. Signed-off-by: Thomas Fitzsimmons Reviewed-by: Stefan Roese

Merge branch 'master' of git://git.denx.de/u-boot-sh

2019-05-27T00:18:20Z

- Gen3 PCIe driver + enablement on Salvator-X platforms. - Gen3 recovery SPL used to reload ATF/OpTee/U-Boot instead of minimon. - SDHI HS400 fixes ported from latest BSP and datasheet.

driver: mmc: adopt 32 bit addr in fsl_esdhc for CONFIG_PPC

2019-05-23T08:52:33Z

PowerPC supports 32 bit address. So adopt 32 bit addr in fsl_esdhc for CONFIG_PPC. Signed-off-by: Yinbo Zhu Reviewed-by: Prabhakar Kushwaha

driver: mmc: set sdhc clock in fsl_esdhc for CONFIG_PPC

2019-05-23T08:52:33Z

Signed-off-by: Yinbo Zhu Reviewed-by: Prabhakar Kushwaha

mmc: tmio: sdhi: HS400 manual adjustment

2019-05-21T20:15:32Z

Since Gen3 SDHI has an internal DS signal AC-spec violation in HS400 mode, CRC-error may occur in read command in HS400 mode. This phoenomenon occurs at low/high temperature. To fix this, after completion of HS400 tuning, enable manual calibration. However, Gen3 M3 Ver.1.2 or earlier and H3 1.x does not support HS400. These SoC forcibly use HS200 mode by SoC attribute. The DT adjustment of the tuning parameters is not supported until the DT property names become clear. Signed-off-by: Marek Vasut Adapted from a patch by Takeshi Saito Cc: Nobuhiro Iwamatsu Cc: Peng Fan

mmc: tmio: sdhi: Minor macro cleanup

2019-05-21T20:15:32Z

Clean up the whitespaces in macros, no functional change. Signed-off-by: Marek Vasut Cc: Nobuhiro Iwamatsu Cc: Peng Fan

Revert "mmc: fsl_esdhc: fix sd/mmc ddr mode clock setting issue"

2019-05-20T03:34:27Z

This reverts commit 72a89e0da5ac6a4ab929b15a2b656f04f50767f6, which causes the imx53 HSC to hang as the eMMC is not working properly anymore. The exact error message: MMC write: dev # 0, block # 2, count 927 ... mmc write failed 0 blocks written: ERROR imx53 is not using the DDR mode. Debugging of pre_div and div generation showed that those values are generated in a way, which is not matching the ones from working setup. As the original patch was performing code refactoring, let's revert this change, so all imx53 boards would work again. Signed-off-by: Lukasz Majewski