<feed xmlns='http://www.w3.org/2005/Atom'>
<title>bcm63xx/u-boot/drivers/net/Kconfig, branch master</title>
<subtitle>Broadcom-s U-Boot</subtitle>
<id>https://git.openwrt.org/project/bcm63xx/u-boot/atom?h=master</id>
<link rel='self' href='https://git.openwrt.org/project/bcm63xx/u-boot/atom?h=master'/>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/'/>
<updated>2019-05-26T18:40:50Z</updated>
<entry>
<title>configs: Migrate CONFIG_FMAN_ENET and some related options to Kconfig</title>
<updated>2019-05-26T18:40:50Z</updated>
<author>
<name>Tom Rini</name>
</author>
<published>2019-05-12T11:59:12Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=cc1e98b559e46630c3421a7762d02a58e5480926'/>
<id>urn:sha1:cc1e98b559e46630c3421a7762d02a58e5480926</id>
<content type='text'>
Move the main symbol for Freescale Fman Ethernet controller option to
Kconfig.  Also migrate the CONFIG_SYS_QE_FMAN_FW_IN_xxx macros and
rename the SPIFLASH one to follow the same format as all of the others.
To do this fully we need to migrate CONFIG_QC, do so.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>mips: rename mach-mt7620 to mach-mtmips</title>
<updated>2019-05-03T14:43:11Z</updated>
<author>
<name>Weijie Gao</name>
</author>
<published>2019-04-30T03:13:58Z</published>
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<id>urn:sha1:16b94903e2462a8983322bbc865c0617b9e02b79</id>
<content type='text'>
Currently mach-mt7620 contains only support for mt7628. To avoid confusion,
rename mach-mt7620 to mach-mtmips, which means MediaTek MIPS platforms.
MT7620 and MT7628 should be distinguished by SOC_MT7620 and SOC_MT7628
because they do not share the same lowlevel codes.

Dependencies of four drivers are changed to SOC_MT7628 as these drivers
are only used by MT7628.

Cc: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Signed-off-by: Weijie Gao &lt;weijie.gao@mediatek.com&gt;
</content>
</entry>
<entry>
<title>net: add higmacv300 Ethernet driver for HiSilicon platform</title>
<updated>2019-04-23T21:57:24Z</updated>
<author>
<name>Shawn Guo</name>
</author>
<published>2019-03-20T07:32:40Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=1d5b5d2f8f9591149bedf9887c34e7eb5398ca53'/>
<id>urn:sha1:1d5b5d2f8f9591149bedf9887c34e7eb5398ca53</id>
<content type='text'>
It adds the driver for HIGMACV300 Ethernet controller found on HiSilicon
SoCs like Hi3798CV200.  It's based on a downstream U-Boot driver, but
quite a lot of code gets rewritten and cleaned up to adopt driver model
and PHY API.

Signed-off-by: Shawn Guo &lt;shawn.guo@linaro.org&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
</entry>
<entry>
<title>net: Kconfig: FEC: Add dependency on VF610</title>
<updated>2019-04-13T18:30:08Z</updated>
<author>
<name>Lukasz Majewski</name>
</author>
<published>2019-02-13T21:46:39Z</published>
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<id>urn:sha1:f1cbd87e50e40b072f979334dcbcc42af7c45e05</id>
<content type='text'>
Signed-off-by: Lukasz Majewski &lt;lukma@denx.de&gt;
Reviewed-by: Stefan Agner &lt;stefan.agner@toradex.com&gt;
</content>
</entry>
<entry>
<title>arm: socfpga: gen5 enable designware_socfpga</title>
<updated>2019-02-18T12:00:53Z</updated>
<author>
<name>Simon Goldschmidt</name>
</author>
<published>2019-01-13T18:58:41Z</published>
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<id>urn:sha1:6fb1eb1b7642d0d4dc984bc087939fb40142754c</id>
<content type='text'>
Enable the socfpga specific designware ethernet driver by default for
socfpga by implying it when enabling CONFIG_ETH_DESIGNWARE for a
MACH_SOCFPGA config.

This is required to remove the hacky reset and phy mode handling in
arch/arm/mach-socfpga.

Signed-off-by: Simon Goldschmidt &lt;simon.k.r.goldschmidt@gmail.com&gt;
</content>
</entry>
<entry>
<title>net: designware: socfpga: adapt to Gen5</title>
<updated>2019-02-18T12:00:53Z</updated>
<author>
<name>Simon Goldschmidt</name>
</author>
<published>2019-01-13T18:58:40Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=4f1267cea1e68395f5c6fd15624e88dfdc1c1540'/>
<id>urn:sha1:4f1267cea1e68395f5c6fd15624e88dfdc1c1540</id>
<content type='text'>
This driver was written for Arria10, but it applies to Gen5, too.

The main difference is that Gen5 has 2 MACs (Arria10 has 3) and the
syscon bits are encoded in the same register, thus an offset is needed.

This offset is already read from the devicetree, but for Arria10 it is
always 0, which is probably why it has been ignored. By using this
offset when writing the phy mode into the syscon regiter, we can use
this driver to set the phy mode for both of the MACs on Gen5.

Since the PHY mode bits in sysmgr are the same even for Stratix10,
let's drop the detection of the sub-mach by checking compatible
version and just use the same code for all FPGAs.

To work correctly, this driver depends on SYSCON and REGMAP, so select
those via Kconfig when it is enabeld.

Tested on socfpga_socrates (where the 2nd MAC is connected, so a shift
offset is required).

Signed-off-by: Simon Goldschmidt &lt;simon.k.r.goldschmidt@gmail.com&gt;
</content>
</entry>
<entry>
<title>net: mscc: Move ocelot_switch to mscc_eswitch folder</title>
<updated>2019-02-01T13:13:36Z</updated>
<author>
<name>Horatiu Vultur</name>
</author>
<published>2019-01-31T14:30:33Z</published>
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<id>urn:sha1:4c66157f427ad87d683b76d6819a00138e9f71dd</id>
<content type='text'>
Move file ocelot_switch to mscc_eswitch to prepare to add
new net drivers for other MSCC SoCs.

Signed-off-by: Horatiu Vultur &lt;horatiu.vultur@microchip.com&gt;
</content>
</entry>
<entry>
<title>net: add MSCC Ocelot switch support</title>
<updated>2019-01-23T17:26:44Z</updated>
<author>
<name>Gregory CLEMENT</name>
</author>
<published>2019-01-17T16:07:13Z</published>
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<id>urn:sha1:c8546163fa92bb46c09017db18dadbb26e639895</id>
<content type='text'>
This patch adds support for the Microsemi Ethernet switch present on
Ocelot SoCs.

Signed-off-by: Gregory CLEMENT &lt;gregory.clement@bootlin.com&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</content>
</entry>
<entry>
<title>ethernet: MediaTek: add ethernet driver for MediaTek ARM-based SoCs</title>
<updated>2019-01-14T22:43:18Z</updated>
<author>
<name>Weijie Gao</name>
</author>
<published>2018-12-20T08:12:53Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=23f17164d9ed6b92f7cd2064aa80f15da5489056'/>
<id>urn:sha1:23f17164d9ed6b92f7cd2064aa80f15da5489056</id>
<content type='text'>
This patch adds ethernet support for Mediatek ARM-based SoCs, including
a minimum setup of the integrated switch.

Cc: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Signed-off-by: Mark Lee &lt;Mark-MC.Lee@mediatek.com&gt;
Signed-off-by: Weijie Gao &lt;weijie.gao@mediatek.com&gt;
Tested-By: "Frank Wunderlich" &lt;frank-w@public-files.de&gt;
</content>
</entry>
<entry>
<title>net: add support for bcm6368-enet</title>
<updated>2018-12-19T14:23:01Z</updated>
<author>
<name>Álvaro Fernández Rojas</name>
</author>
<published>2018-12-01T18:00:32Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=9622972af47a05bc8d801625ee2ae3aaff416dbf'/>
<id>urn:sha1:9622972af47a05bc8d801625ee2ae3aaff416dbf</id>
<content type='text'>
Signed-off-by: Álvaro Fernández Rojas &lt;noltari@gmail.com&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</content>
</entry>
</feed>
