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<title>bcm63xx/u-boot/drivers/net/phy/Kconfig, branch master</title>
<subtitle>Broadcom-s U-Boot</subtitle>
<id>https://git.openwrt.org/project/bcm63xx/u-boot/atom?h=master</id>
<link rel='self' href='https://git.openwrt.org/project/bcm63xx/u-boot/atom?h=master'/>
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<updated>2019-05-14T19:43:33Z</updated>
<entry>
<title>net: phy: micrel: Allow KSZ8xxx and KSZ90x1 to be used together</title>
<updated>2019-05-14T19:43:33Z</updated>
<author>
<name>James Byrne</name>
</author>
<published>2019-03-06T12:48:27Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=77b508d34b9485c981b084e8169dd64b381935b6'/>
<id>urn:sha1:77b508d34b9485c981b084e8169dd64b381935b6</id>
<content type='text'>
Commit d397f7c45b0b ("net: phy: micrel: Separate KSZ9000 drivers from
KSZ8000 drivers") separated the KSZ8xxx and KSZ90x1 drivers and warns
that you shouldn't select both of them due to a device ID clash between
the KSZ9021 and the KS8721, asserting that "it is highly unlikely for a
system to contain both a KSZ8000 and a KSZ9000 PHY". Unfortunately
boards like the SAMA5D3xEK do contain both types of PHY, but fortunately
the Linux Micrel PHY driver provides a solution by using different PHY
ID and mask values to distinguish these chips.

This commit contains the following changes:

- The PHY ID and mask values for the KSZ9021 and the KS8721 now match
those used by the Linux driver.
- The warnings about not enabling both drivers have been removed.
- The description for PHY_MICREL_KSZ8XXX has been corrected (these are
10/100 PHYs, not GbE PHYs).
- PHY_MICREL_KSZ9021 and PHY_MICREL_KSZ9031 no longer select PHY_GIGE
since this is selected by PHY_MICREL_KSZ90X1.
- All of the relevant defconfig files have been updated now that
PHY_MICREL_KSZ8XXX does not default to 'Y'.

Signed-off-by: James Byrne &lt;james.byrne@origamienergy.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
</entry>
<entry>
<title>net: phy: realtek: Introduce quirk to mark RXC not stoppable</title>
<updated>2019-05-07T19:51:55Z</updated>
<author>
<name>Carlo Caione</name>
</author>
<published>2019-01-24T08:54:37Z</published>
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<id>urn:sha1:d47cfdbd315297af73746462599b0c81dac6054a</id>
<content type='text'>
When EEE is supported by the PHY and the driver allows it, libphy in the
kernel is configuring the PHY to stop receiving the xMII clock while it
is signaling LPI. While this (usually) works fine in the kernel this is
causing issues in U-Boot when rebooting from the linux kernel with this
bit set (without having the possibility to reset the PHY) where the PHY
suddenly stops working.

A new quirk is introduced to unconditionally reset this bit. If the
quirk is not enabled using the proper configuration symbol, the PHY state
is not changed.

Signed-off-by: Carlo Caione &lt;ccaione@baylibre.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
</entry>
<entry>
<title>net: phy: aquantia: add firmware loading support</title>
<updated>2018-10-24T19:45:37Z</updated>
<author>
<name>Jeremy Gebben</name>
</author>
<published>2018-09-18T21:49:36Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=4506423ad23749a28ae48720bc64ad40caf089b2'/>
<id>urn:sha1:4506423ad23749a28ae48720bc64ad40caf089b2</id>
<content type='text'>
Aquantia phys have firmware that can be loaded automatically
from storage directly attached to the phy or via MDIO commands.
Add support for loading firmware from either a file or a
raw location on an MMC device.

Signed-off-by: Jeremy Gebben &lt;jgebben@sweptlaser.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
</entry>
<entry>
<title>configs: migrate CONFIG_PHY_AQUANTIA to Kconfig</title>
<updated>2018-10-24T19:45:36Z</updated>
<author>
<name>Jeremy Gebben</name>
</author>
<published>2018-09-18T21:49:35Z</published>
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<id>urn:sha1:1c6501088ecab1eaa959aae54a560c3e1970ba4c</id>
<content type='text'>
The aquantia driver requires both CONFIG_PHY_GIGE and CONFIG_PHYLIB_10G.

Signed-off-by: Jeremy Gebben &lt;jgebben@sweptlaser.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
</entry>
<entry>
<title>net: phy: Don't limit phy addresses by default</title>
<updated>2018-04-13T20:56:47Z</updated>
<author>
<name>Joe Hershberger</name>
</author>
<published>2018-03-30T16:52:16Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=16879cd25a4089cde2f3393fb09567df53402679'/>
<id>urn:sha1:16879cd25a4089cde2f3393fb09567df53402679</id>
<content type='text'>
Some boards expect to find more than one phy while other boards are old
and need to be limited to a specific phy address. Only limit the phy
address for boards that opt in.

Signed-off-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Tested-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Neil Armstrong &lt;narmstrong@baylibre.com&gt;
Reviewed-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
</content>
</entry>
<entry>
<title>net: phy: Add PHY_RTL8211E_PINE64_GIGABIT_FIX for realtek phys</title>
<updated>2018-03-22T20:05:27Z</updated>
<author>
<name>kevans@FreeBSD.org</name>
</author>
<published>2018-02-14T23:02:15Z</published>
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<id>urn:sha1:66526e70381dbaad58533cfbd7bce07c668205c6</id>
<content type='text'>
Setting PHY_RTL8211E_PINE64_GIGABIT_FIX forces internal rx/tx delays off
on the PHY, as well as flipping some magical undocumented bits. The
magic number comes from the Pine64 engineering team, presumably as a
proxy from Realtek. This configuration fixes the throughput on some
Pine64 models. Packet loss of up to 60-70% has been observed without
this.

Signed-off-by: Kyle Evans &lt;kevans@FreeBSD.org&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
</entry>
<entry>
<title>Move CONFIG_PHY_ADDR to Kconfig</title>
<updated>2018-03-13T17:06:33Z</updated>
<author>
<name>Stefan Mavrodiev</name>
</author>
<published>2018-02-02T13:53:38Z</published>
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<id>urn:sha1:b30c4190407be9807f6b5fdcfd3a3d983a961dee</id>
<content type='text'>
CONFIG_PHY_ADDR is used for old-style configuration. This makes
impossible changing the PHY address, if multiple boards share a same
config header file (for example include/configs/sunxi-common.h).

Moving this to Kconfig helps overcoming this issue. It's defined
as entry inside PHYLIB section.

After the implemention, moveconfig was run. The issues are:
	- edb9315a	- CONFIG_PHYLIB is not enabled. Entry is
			  deleted.

	- ds414		- CONFIG_PHYLIB is in incompatible format:
			  { 0x1, 0x0 }. This entry is also deleted.

	- devkit3250	- The PHY_ADDR is in hex format (0x1F).
			  Manually CONFIG_PHY_ADDR=31 is added in
			  the defconfig.

After the changes the suspicious defconfigs passes building.

Signed-off-by: Stefan Mavrodiev &lt;stefan@olimex.com&gt;
Acked-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
[jagan: rebased on master]
Signed-off-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
Reviewed-by: Jagan Teki &lt;jagan@openedev.com&gt;
</content>
</entry>
<entry>
<title>Kconfig: net: phylib: Phylib should depends on NET</title>
<updated>2018-02-08T17:48:10Z</updated>
<author>
<name>Michal Simek</name>
</author>
<published>2018-02-06T12:23:52Z</published>
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<id>urn:sha1:c946b0e9fd722212cb646ea23ea564b4c96e2bb2</id>
<content type='text'>
There is no value to enable phylib without networking support.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
</entry>
<entry>
<title>net: phy: Add Broadcom BCM53xx switch driver</title>
<updated>2018-01-15T18:05:21Z</updated>
<author>
<name>Florian Fainelli</name>
</author>
<published>2017-12-09T22:59:54Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=137963d71a2b2e0a1ac1fd755e0bec1409c2cdbd'/>
<id>urn:sha1:137963d71a2b2e0a1ac1fd755e0bec1409c2cdbd</id>
<content type='text'>
Add a minimalistic Broadcom BCM53xx (roboswitch) switch driver similar
to the Marvell MV88E617x. This takes care of configuring the minimum
amount out of the switch hardware such that each user visible port
(configurable) and the CPU port can forward packets between each other
while preserving isolation with other ports.

This is useful for e.g: the Lamobo R1 board featuring a Broadcom
BCM53125 switch.

Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Signed-off-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
</content>
</entry>
<entry>
<title>net: phy: Add Amlogic Meson GXL Internal PHY support</title>
<updated>2017-11-17T12:44:13Z</updated>
<author>
<name>Neil Armstrong</name>
</author>
<published>2017-10-18T08:02:10Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=8995a96d1d6760c930e37fc92fb718624f5d8fbf'/>
<id>urn:sha1:8995a96d1d6760c930e37fc92fb718624f5d8fbf</id>
<content type='text'>
The Amlogic Meson GXL/GXM families embeds an internal RMII Ethernet PHY.

The PHY acts as a generic PHY but needs a slight configuration right
before it's configuration.

Signed-off-by: Neil Armstrong &lt;narmstrong@baylibre.com&gt;
</content>
</entry>
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