<feed xmlns='http://www.w3.org/2005/Atom'>
<title>bcm63xx/u-boot/drivers/pci/Makefile, branch master</title>
<subtitle>Broadcom-s U-Boot</subtitle>
<id>https://git.openwrt.org/project/bcm63xx/u-boot/atom?h=master</id>
<link rel='self' href='https://git.openwrt.org/project/bcm63xx/u-boot/atom?h=master'/>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/'/>
<updated>2019-06-20T05:14:45Z</updated>
<entry>
<title>dm: pci: add Freescale PowerPC PCIe driver</title>
<updated>2019-06-20T05:14:45Z</updated>
<author>
<name>Hou Zhiqiang</name>
</author>
<published>2019-04-24T14:33:02Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=b89e3d9250046c3e7c956fd5e7a14364747433a4'/>
<id>urn:sha1:b89e3d9250046c3e7c956fd5e7a14364747433a4</id>
<content type='text'>
Add PCIe DM driver for Freescale PowerPC PCIe controllers.

Signed-off-by: Hou Zhiqiang &lt;Zhiqiang.Hou@nxp.com&gt;
Reviewed-by: Prabhakar Kushwaha &lt;prabhakar.kushwaha@nxp.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-sh</title>
<updated>2019-05-27T00:18:20Z</updated>
<author>
<name>Tom Rini</name>
</author>
<published>2019-05-27T00:18:20Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=c18b103657d9541305a45a1fb21f979c317fba49'/>
<id>urn:sha1:c18b103657d9541305a45a1fb21f979c317fba49</id>
<content type='text'>
- Gen3 PCIe driver + enablement on Salvator-X platforms.
- Gen3 recovery SPL used to reload ATF/OpTee/U-Boot instead of minimon.
- SDHI HS400 fixes ported from latest BSP and datasheet.
</content>
</entry>
<entry>
<title>pci: ls_pcie_g4: add device tree fixups for PCI Stream IDs</title>
<updated>2019-05-22T06:54:24Z</updated>
<author>
<name>Hou Zhiqiang</name>
</author>
<published>2019-04-08T10:15:54Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=1d341bc4b6b357e7348ab4393247e369aeb30aa6'/>
<id>urn:sha1:1d341bc4b6b357e7348ab4393247e369aeb30aa6</id>
<content type='text'>
Add the infrastructure for Layerscape SoCs PCIe Gen4 controller
to update device tree nodes to convey SMMU stream IDs in the
device tree.

Signed-off-by: Hou Zhiqiang &lt;Zhiqiang.Hou@nxp.com&gt;
Reviewed-by: Prabhakar Kushwaha &lt;prabhakar.kushwaha@nxp.com&gt;
</content>
</entry>
<entry>
<title>pci: Add PCIe Gen4 controller driver for NXP Layerscape SoCs</title>
<updated>2019-05-22T06:54:24Z</updated>
<author>
<name>Hou Zhiqiang</name>
</author>
<published>2019-04-08T10:15:46Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=07ce19f5e9ad637caa8cb2b6db45a6a28d2d69a1'/>
<id>urn:sha1:07ce19f5e9ad637caa8cb2b6db45a6a28d2d69a1</id>
<content type='text'>
Add PCIe Gen4 driver for the NXP Layerscape SoCs. This PCIe
controller is based on the Mobiveil IP, which is compatible
with the PCI Express™ Base Specification, Revision 4.0.

Signed-off-by: Hou Zhiqiang &lt;Zhiqiang.Hou@nxp.com&gt;
Signed-off-by: Bao Xiaowei &lt;Xiaowei.Bao@nxp.com&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Prabhakar Kushwaha &lt;prabhakar.kushwaha@nxp.com&gt;
</content>
</entry>
<entry>
<title>pci: renesas: Add RCar Gen3 PCIe controller driver</title>
<updated>2019-05-21T20:15:31Z</updated>
<author>
<name>Marek Vasut</name>
</author>
<published>2018-10-16T10:49:19Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=776abedef473659f165dd018388e8b5d81a5c54c'/>
<id>urn:sha1:776abedef473659f165dd018388e8b5d81a5c54c</id>
<content type='text'>
Add driver for the Renesas RCar PCIe controller present on Gen3 SoCs.
The PCIe on Gen3 is used both to connect external PCIe peripherals.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@gmail.com&gt;
Cc: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Cc: Nobuhiro Iwamatsu &lt;iwamatsu@nigauri.org&gt;
</content>
</entry>
<entry>
<title>pci: intel: Add Intel FPGA PCIe controller driver</title>
<updated>2018-05-08T13:07:35Z</updated>
<author>
<name>Ley Foon Tan</name>
</author>
<published>2018-04-20T13:55:45Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=7c45862f22fd6275a48130197d315dcf8723cfb5'/>
<id>urn:sha1:7c45862f22fd6275a48130197d315dcf8723cfb5</id>
<content type='text'>
Add PCIe driver for Intel FPGA PCIe IP. This driver operates the PCIe IP in
rootport mode only, the EP mode is not supported. The driver is tested
with the Intel e1000e NIC driver.

Signed-off-by: Ley Foon Tan &lt;ley.foon.tan@intel.com&gt;
</content>
</entry>
<entry>
<title>SPDX: Convert all of our single license tags to Linux Kernel style</title>
<updated>2018-05-07T13:34:12Z</updated>
<author>
<name>Tom Rini</name>
</author>
<published>2018-05-06T21:58:06Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=83d290c56fab2d38cd1ab4c4cc7099559c1d5046'/>
<id>urn:sha1:83d290c56fab2d38cd1ab4c4cc7099559c1d5046</id>
<content type='text'>
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>arm64: a37xx: pci: add support for aardvark pcie driver</title>
<updated>2018-03-30T10:52:49Z</updated>
<author>
<name>Wilson Ding</name>
</author>
<published>2018-03-26T07:57:29Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=e51f2b14c4936daf3e3040bddb15f63d35e6d988'/>
<id>urn:sha1:e51f2b14c4936daf3e3040bddb15f63d35e6d988</id>
<content type='text'>
This patch introduced the Aardvark PCIe driver based
driver model.
The PCIe driver is supposed to work in Root Complex
mode. It only supports X1 lane width.

Signed-off-by: Wilson Ding &lt;dingwei@marvell.com&gt;
Reviewed-on: http://vgitil04.il.marvell.com:8080/38725
Reviewed-by: Victor Gu &lt;xigu@marvell.com&gt;
Reviewed-by: Hua Jing &lt;jinghua@marvell.com&gt;
Tested-by: Hua Jing &lt;jinghua@marvell.com&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
Cc: Stefan Roese &lt;sr@denx.de&gt;
Signed-off-by: Ken Ma &lt;make@marvell.com&gt;
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
</entry>
<entry>
<title>pci: rmobile: Add RCar Gen2 PCIe controller driver</title>
<updated>2018-01-27T19:38:53Z</updated>
<author>
<name>Marek Vasut</name>
</author>
<published>2018-01-18T13:35:35Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=5f14f7d783f1a3a2e8085738a31b82580addf7b9'/>
<id>urn:sha1:5f14f7d783f1a3a2e8085738a31b82580addf7b9</id>
<content type='text'>
Add driver for the Renesas RCar PCIe controller present on Gen2 SoCs.
The PCIe on Gen2 is used both to connect external PCIe peripherals as
well as access the on-SoC USB EHCI controller.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@gmail.com&gt;
</content>
</entry>
<entry>
<title>PCI: Drop CONFIG_TSI108_PCI</title>
<updated>2018-01-10T13:05:49Z</updated>
<author>
<name>Tuomas Tynkkynen</name>
</author>
<published>2017-12-18T22:28:42Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=55acf49eaba0a05d1ca1406d60ec645e992b4641'/>
<id>urn:sha1:55acf49eaba0a05d1ca1406d60ec645e992b4641</id>
<content type='text'>
Last user of this option went away in 2015 in commit:
d928664f41 ("powerpc: 74xx_7xx: remove 74xx_7xx cpu support")

Signed-off-by: Tuomas Tynkkynen &lt;tuomas@tuxera.com&gt;
</content>
</entry>
</feed>
