<feed xmlns='http://www.w3.org/2005/Atom'>
<title>bcm63xx/u-boot/drivers/ram/stm32mp1, branch master</title>
<subtitle>Broadcom-s U-Boot</subtitle>
<id>https://git.openwrt.org/project/bcm63xx/u-boot/atom?h=master</id>
<link rel='self' href='https://git.openwrt.org/project/bcm63xx/u-boot/atom?h=master'/>
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<updated>2019-05-23T09:38:11Z</updated>
<entry>
<title>stm32mp1: ram: add tuning in DDR interactive mode</title>
<updated>2019-05-23T09:38:11Z</updated>
<author>
<name>Patrick Delaunay</name>
</author>
<published>2019-04-10T12:09:29Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=187c41d783371dc3b7ecae45f450b330f5e1bb25'/>
<id>urn:sha1:187c41d783371dc3b7ecae45f450b330f5e1bb25</id>
<content type='text'>
Add command tuning for DDR interactive mode, used during
board bring-up or with CubeMX DDR tools to execute software
tuning for the DDR configuration:
- software read DQS Gating (replace the built-in one)
- Bit de-skew
- Eye Training or DQS training

Signed-off-by: Patrick Delaunay &lt;patrick.delaunay@st.com&gt;
</content>
</entry>
<entry>
<title>stm32mp1: ram: add tests in DDR interactive mode</title>
<updated>2019-05-23T09:38:11Z</updated>
<author>
<name>Patrick Delaunay</name>
</author>
<published>2019-04-10T12:09:28Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=0d447524425ed29cf80987fb058e3bc5e941ba87'/>
<id>urn:sha1:0d447524425ed29cf80987fb058e3bc5e941ba87</id>
<content type='text'>
Add command tests for DDR interactive mode, used during
board bring-up or with CubeMX DDR tools to verify the
DDR configuration.

Signed-off-by: Patrick Delaunay &lt;patrick.delaunay@st.com&gt;
</content>
</entry>
<entry>
<title>stm32mp1: ram: add interactive mode for DDR configuration</title>
<updated>2019-05-23T09:38:11Z</updated>
<author>
<name>Patrick Delaunay</name>
</author>
<published>2019-04-10T12:09:27Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=01a7510849fdd53f363e4f3aef14342fa2ae417a'/>
<id>urn:sha1:01a7510849fdd53f363e4f3aef14342fa2ae417a</id>
<content type='text'>
This debug mode is used by CubeMX DDR tuning tools
or manualy for tests during board bring-up.
It is simple console used to change DDR parameters and check
initialization.

Signed-off-by: Patrick Delaunay &lt;patrick.delaunay@st.com&gt;
</content>
</entry>
<entry>
<title>stm32mp1: ram: add support for LPDDR2/LPDDR3</title>
<updated>2019-05-23T09:38:11Z</updated>
<author>
<name>Patrick Delaunay</name>
</author>
<published>2019-04-10T12:09:26Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=1767ac2d1f7fadc0780f95243906dda7553ac77a'/>
<id>urn:sha1:1767ac2d1f7fadc0780f95243906dda7553ac77a</id>
<content type='text'>
Manage power supply configuration for board using stpmic1
with LPDDR2 or with LPDDR3:
+ VDD_DDR1 = 1.8V with BUCK3 (bypass if possible)
+ VDD_DDR2 = 1.2V with BUCK2

Signed-off-by: Patrick Delaunay &lt;patrick.delaunay@st.com&gt;
</content>
</entry>
<entry>
<title>stm32mp1: ram: update parameter array initialization</title>
<updated>2019-05-23T09:38:10Z</updated>
<author>
<name>Patrick Delaunay</name>
</author>
<published>2019-04-10T12:09:25Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=53bb8316583bf2206918457ec049b001d5b40a0f'/>
<id>urn:sha1:53bb8316583bf2206918457ec049b001d5b40a0f</id>
<content type='text'>
Force alignment of the size of parameters array with
the expected value in the binding, that allows compilation
error when the array size change.

Signed-off-by: Patrick Delaunay &lt;patrick.delaunay@st.com&gt;
</content>
</entry>
<entry>
<title>stm32mp1: ram: change ddr speed to kHz</title>
<updated>2019-05-23T09:38:10Z</updated>
<author>
<name>Patrick Delaunay</name>
</author>
<published>2019-04-10T12:09:23Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=c60fed14f64ac82721ef9afc6ac47e0379538900'/>
<id>urn:sha1:c60fed14f64ac82721ef9afc6ac47e0379538900</id>
<content type='text'>
Allow fractional support in DDR tools.

Signed-off-by: Patrick Delaunay &lt;patrick.delaunay@st.com&gt;
</content>
</entry>
<entry>
<title>stm32mp1: ram: increase the delay after reset to 128 cycles</title>
<updated>2019-05-23T09:38:10Z</updated>
<author>
<name>Patrick Delaunay</name>
</author>
<published>2019-04-10T12:09:22Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=0cb1aa94093c22dd5b3dce32d371e154abc06ffe'/>
<id>urn:sha1:0cb1aa94093c22dd5b3dce32d371e154abc06ffe</id>
<content type='text'>
Component Notification DDR controller errata (3.00a):9001313030
Synchronization Time Waited After De-assertion of presetn is
128 pclk Cycles.

Signed-off-by: Patrick Delaunay &lt;patrick.delaunay@st.com&gt;
</content>
</entry>
<entry>
<title>stm32mp1: ram: update mask for operating mode</title>
<updated>2019-05-23T09:38:10Z</updated>
<author>
<name>Patrick Delaunay</name>
</author>
<published>2019-04-10T12:09:21Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=c3ec370aed1d64c70578b22b18bed5c05f040962'/>
<id>urn:sha1:c3ec370aed1d64c70578b22b18bed5c05f040962</id>
<content type='text'>
Regression introduced by rebase, when loop
was replaced by readl_poll_timeout() function.

Signed-off-by: Patrick Delaunay &lt;patrick.delaunay@st.com&gt;
</content>
</entry>
<entry>
<title>stm32mp1: add trusted boot with TF-A</title>
<updated>2019-04-12T14:09:13Z</updated>
<author>
<name>Patrick Delaunay</name>
</author>
<published>2019-02-12T10:44:39Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=abf2678f0f0d796295f3bfbe422436292e0795f7'/>
<id>urn:sha1:abf2678f0f0d796295f3bfbe422436292e0795f7</id>
<content type='text'>
Add support of trusted boot, using TF-A as first stage bootloader,
The boot sequence is
  BootRom &gt;=&gt; TF-A.stm32 (clock &amp; DDR) &gt;=&gt; U-Boot.stm32

The TF-A monitor provides secure monitor with support of SMC
- proprietary to manage secure devices (BSEC for example)
- PSCI for power

The same device tree is used for STMicroelectronics boards with
basic boot and with trusted boot.

Signed-off-by: Patrick Delaunay &lt;patrick.delaunay@st.com&gt;
</content>
</entry>
<entry>
<title>regmap: change regmap_init_mem() to take ofnode instead udevice</title>
<updated>2018-05-07T19:49:51Z</updated>
<author>
<name>Masahiro Yamada</name>
</author>
<published>2018-04-19T03:14:03Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=d35812368a590ebe1a5c92199a1a57ce3e80722e'/>
<id>urn:sha1:d35812368a590ebe1a5c92199a1a57ce3e80722e</id>
<content type='text'>
Currently, regmap_init_mem() takes a udevice. This requires the node
has already been associated with a device. It prevents syscon/regmap
from behaving like those in Linux.

Change the first argumenet to take a device node.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Acked-by: Neil Armstrong &lt;narmstrong@baylibre.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
</feed>
