bcm63xx/u-boot/drivers/usb/gadget, branch master

Merge tag 'u-boot-imx-20190628' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

2019-06-28T12:00:22Z

Fixes for 2019.07 - menlo board - allow SDB on Sabre - HAB for mx6sl - apalis board

usb: gadget: f_sdp: Allow SPL to load and boot FIT via SDP

2019-06-27T11:50:28Z

Add support for loading u-boot FIT images over the USB SDP protocol in the SPL Signed-off-by: Frieder Schrempf [Various build fixes] Signed-off-by: Sjoerd Simons Tested-by: Fabio Estevam Tested-by: Lukasz Majewski

usb: dwc2: allow peripheral mode for OTG configuration

2019-06-19T14:56:11Z

Allow device mode in DWC2 driver when device tree select the dr_mode "peripheral" or "otg". The device mode is not allowed when dr_mode = "host" in device tree. Signed-off-by: Patrick Delaunay Reviewed-by: Marek Vasut

usb: dwc2: correctly handle binding for g-tx-fifo-size

2019-06-19T14:56:11Z

Manage g-tx-fifo-size as a array as specify in the binding. Signed-off-by: Patrick Delaunay Reviewed-by: Marek Vasut

rockchip: use 'arch-rockchip' as header file path

2019-04-30T22:00:05Z

Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang Reviewed-by: Philipp Tomsich

usb: dwc2: fix gadget disconnect

2019-04-21T08:26:52Z

This fixes a disconnect issue detected with fastboot command, when using dwc2 driver. - On u-boot side: uboot>$ fastboot 0 - On USB host PC side, few seconds after PC>$ fastboot reboot # Get stuck, uboot target never reboots By enabling DEBUG_ISR logs, the bus suspend interrupt is seen before the PC command has been issued. When the USB bus suspend occurs, there's a HACK that disables the fastboot (composite driver). Here is the call stack upon USB bus suspend: - dwc2_handle_usb_suspend_intr() - dev->driver->disconnect() - composite_disconnect() - reset_config() - f->disable() - fastboot_disable() - usb_ep_disable(f_fb->out_ep); - usb_ep_disable(f_fb->in_ep); .. other disable calls. When the resume interrupt happens, everything has been disabled, then nothing happens. fastboot command gets stuck on HOST side. Remove original HACK, that disconnects the composite driver upon USB bus suspend. Implement disconnect detection instead: - check GINTSTS OTG interrupt - read GOTGINT register - check GOTGINT, SesEndDet bit (e.g. session end) This is inspired by what is implemented currently in Linux dwc2 driver. Signed-off-by: Fabrice Gasnier Reviewed-by: Marek Vasut

stm32mp1: add stusb1600 support for DK1 and DK2 board

2019-04-21T08:26:52Z

The DK1 and DK2 boards use the USB Type-C controller STUSB1600. This patch updates: - the device tree to add the I2C node in the DT - the board stm32mp1 to probe this I2C device and use this controller to check cable detection. - the DWC2 driver to support a new dt property "u-boot,force-b-session-valid" which forces B session and device mode; it is a workaround because the VBUS sensing and ID detection isn't available with stusb1600. Signed-off-by: Patrick Delaunay Reviewed-by: Lukasz Majewski

usb: dwc2: add support for STM32MP1

2019-04-21T08:26:52Z

Add compatible "st,stm32mp1-hsotg" and associated driver data to manage the usb33d-supply and the ST specific register for VBus sensing. Signed-off-by: Patrick Delaunay # Conflicts: # drivers/usb/gadget/dwc2_udc_otg.c Reviewed-by: Lukasz Majewski

usb: dwc2_udc_otg: Add tx_fifo_sz array support

2019-04-21T08:26:52Z

All TX fifo size can be different, add tx_fifo_sz_array[] into dwc2_plat_otg_data to be able to set them. tx_fifo_sz_array[] is 17 Bytes long and can contains max 16 tx fifo size (synopsys IP supports max 16 IN endpoints). First entry of tx_fifo_sz_array[] is the number of valid fifo size the array contains. In case of tx_fifo_sz_array[] doesn't contains the same number of element than max hardware endpoint, display a warning message. Compatibility with board which doesn't use tx_fifo_sz_array[] (Rockchip rk322x/rk3128/rv1108/rk3288/rk3036) is kept. Signed-off-by: Patrice Chotard Signed-off-by: Patrick Delaunay Reviewed-by: Lukasz Majewski

usb: dwc2_udc_otg: Read MAX_HW_ENDPOINT from HWCFG4 register

2019-04-21T08:26:52Z

Some DWC2 ip variant doesn't use 16 hardware endpoint as hardcoded in the driver. Bits INEps [29:26] of HWCFG4 register allows to get this information. Signed-off-by: Patrice Chotard Signed-off-by: Patrick Delaunay Reviewed-by: Lukasz Majewski