bcm63xx/u-boot/include/asm-ppc/fsl_lbc.h, branch master

Move architecture-specific includes to arch/$ARCH/include/asm

2010-04-13T07:13:12Z

This helps to clean up the include/ directory so that it only contains non-architecture-specific headers and also matches Linux's directory layout which many U-Boot developers are already familiar with. Signed-off-by: Peter Tyser

ppc/p4080: Add p4080 platform immap definitions

2009-09-24T17:05:27Z

The p4080 SoC has a significant amount of commonality with the 85xx/PQ3 platform. We reuse the 85xx immap and just add new definitions for local access and global utils. The global utils is now broken into global utils, clocking and run control/power management. The offsets from CCSR for a number of blocks have also changed. We introduce the CONFIG_FSL_CORENET define to distinquish the PQ3 style of platform from the new p4080 platform. We don't use QoirQ as there are products (like p2020) that are PQ3 based platforms but have the QoirQ name. Signed-off-by: Kumar Gala

ppc/85xx: Fix LCRR_CLKDIV defines

2009-09-24T17:04:57Z

For some reason the CLKDIV field varies between SoC in how it interprets the bit values. All 83xx and early (e500v1) PQ3 devices support: clk/2: CLKDIV = 2 clk/4: CLKDIV = 4 clk/8: CLKDIV = 8 Newer PQ3 (e500v2) and MPC86xx support: clk/4: CLKDIV = 2 clk/8: CLKDIV = 4 clk/16: CLKDIV = 8 Ensure that the MPC86xx and MPC85xx still get the same behavior and make the defines reflect their logical view (not the value of the field). Signed-off-by: Kumar Gala Acked-by: Peter Tyser

83xx: Replace CONFIG_MPC83[0-9]X with MPC83[0-9]x

2009-06-12T18:47:17Z

Use the standard lowercase "x" capitalization that other Freescale architectures use for CPU defines to prevent confusion and errors Signed-off-by: Peter Tyser Signed-off-by: Kim Phillips

Add LSDMR (SDRAM Mode Register) definition on localbus

2009-03-30T18:33:49Z

The masks for various bit defines of LSDMR are common and thus we can define them in one place rather than replicating them in each config.h Signed-off-by: Kumar Gala

85xx: Handle eLBC difference w/36-bit physical

2009-01-23T23:08:28Z

The eLBC only handles 32-bit physical address in systems with 36-bit physical. The previos generation of LBC handled 34-bit physical address in 36-bit systems. Added a new CONFIG option to convey the difference between the LBC and eLBC. Also added defines for XAM bits used in LBC for the extended 34-bit support. Signed-off-by: Kumar Gala

mpc8xxx: LCRR[CLKDIV] is sometimes five bits

2008-12-20T00:20:25Z

On newer CPUs, 8536, 8572, and 8610, the CLKDIV field of LCRR is five bits instead of four. In order to avoid an ifdef, LCRR_CLKDIV is set to 0x1f on all systems. It should be safe as the fifth bit was defined as reserved and set to 0. Code that was using a hard coded 0x0f is changed to use LCRR_CLKDIV. Signed-off-by: Trent Piepho Acked-by: Kumar Gala Acked-by: Jon Loeliger

FSL: Moved BR_PHYS_ADDR for localbus to common header

2008-12-04T09:15:43Z

The BR_PHYS_ADDR macro is useful on all machines that have local bus which is pretty much all 83xx/85xx/86xx chips. Additionally most 85xx & 86xx will need it if they want to support 36-bit physical addresses. Signed-off-by: Kumar Gala Acked-by: Andy Fleming

Make Freescale local bus registers available for both 83xx and 85xx.

2008-10-29T16:12:53Z

- Rename lbus83xx_t to fsl_lbus_t and move it to asm/fsl_lbc.h so that it can be shared by both 83xx and 85xx - Remove lbus83xx_t and replace it with fsl_lbus_t in all 83xx boards files which use lbus83xx_t. - Move FMR, FIR, FCR, FPAR, LTESR from mpc83xx.h to asm/fsl_lbc.h so that 85xx can share them. Signed-off-by: Jason Jin Signed-off-by: Haiying Wang Signed-off-by: Scott Wood

Fix merge problems

2008-08-06T12:05:38Z

Signed-off-by: Stefan Roese