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<title>bcm63xx/u-boot/include/dt-bindings/clk, branch master</title>
<subtitle>Broadcom-s U-Boot</subtitle>
<id>https://git.openwrt.org/project/bcm63xx/u-boot/atom?h=master</id>
<link rel='self' href='https://git.openwrt.org/project/bcm63xx/u-boot/atom?h=master'/>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/'/>
<updated>2019-02-27T01:12:33Z</updated>
<entry>
<title>clk: Add SiFive FU540 PRCI clock driver</title>
<updated>2019-02-27T01:12:33Z</updated>
<author>
<name>Anup Patel</name>
</author>
<published>2019-02-25T08:14:49Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=c40b6df87fc0193a7184ada9f53aaf57cdec0cdf'/>
<id>urn:sha1:c40b6df87fc0193a7184ada9f53aaf57cdec0cdf</id>
<content type='text'>
Add driver code for the SiFive FU540 PRCI IP block.  This IP block
handles reset and clock control for the SiFive FU540 device and
implements SoC-level clock tree controls and dividers.

Based on code written by Wesley Terpstra &lt;wesley@sifive.com&gt;
found in commit 999529edf517ed75b56659d456d221b2ee56bb60 of:
https://github.com/riscv/riscv-linux

Boot and PLL rate change were tested on a SiFive HiFive Unleashed
board.

Signed-off-by: Paul Walmsley &lt;paul.walmsley@sifive.com&gt;
Signed-off-by: Atish Patra &lt;atish.patra@wdc.com&gt;
Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Alexander Graf &lt;agraf@suse.de&gt;
</content>
</entry>
<entry>
<title>clk: Add MPC83xx clock driver</title>
<updated>2018-09-18T06:01:18Z</updated>
<author>
<name>Mario Six</name>
</author>
<published>2018-08-06T08:23:36Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=07d538d2814fa03be243c71879372f4263030b78'/>
<id>urn:sha1:07d538d2814fa03be243c71879372f4263030b78</id>
<content type='text'>
Add a clock driver for the MPC83xx architecture.

Signed-off-by: Mario Six &lt;mario.six@gdsys.cc&gt;
</content>
</entry>
<entry>
<title>ARM: dts: dra7xx: sync DT with latest Linux</title>
<updated>2016-12-04T18:54:51Z</updated>
<author>
<name>Lokesh Vutla</name>
</author>
<published>2016-11-23T07:55:29Z</published>
<link rel='alternate' type='text/html' href='https://git.openwrt.org/project/bcm63xx/u-boot/commit/?id=7aa1a40876a0da0fadf360a352bba0adf8624904'/>
<id>urn:sha1:7aa1a40876a0da0fadf360a352bba0adf8624904</id>
<content type='text'>
Sync all dra7xx based dts files with latest Linux

Signed-off-by: Lokesh Vutla &lt;lokeshvutla@ti.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
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