add chaos_calmer branch
[15.05/openwrt.git] / target / linux / ipq806x / patches-4.0 / 707-ARM-dts-qcom-add-mdio-nodes-to-ap148-db149.patch
1 From e81de9d28bd0421c236df322872e64edf4ee1852 Mon Sep 17 00:00:00 2001
2 From: Mathieu Olivari <mathieu@codeaurora.org>
3 Date: Mon, 11 May 2015 16:32:09 -0700
4 Subject: [PATCH 7/8] ARM: dts: qcom: add mdio nodes to ap148 & db149
5
6 Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
7 ---
8  arch/arm/boot/dts/qcom-ipq8064-ap148.dts | 40 ++++++++++++++++++++++++++-
9  arch/arm/boot/dts/qcom-ipq8064-db149.dts | 46 ++++++++++++++++++++++++++++++++
10  2 files changed, 85 insertions(+), 1 deletion(-)
11
12 --- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
13 +++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
14 @@ -14,8 +14,9 @@
15                 };
16         };
17  
18 -       alias {
19 +       aliases {
20                 serial0 = &uart4;
21 +               mdio-gpio0 = &mdio0;
22         };
23  
24         chosen {
25 @@ -54,6 +55,15 @@
26                                         bias-none;
27                                 };
28                         };
29 +
30 +                       mdio0_pins: mdio0_pins {
31 +                               mux {
32 +                                       pins = "gpio0", "gpio1";
33 +                                       function = "gpio";
34 +                                       drive-strength = <8>;
35 +                                       bias-disable;
36 +                               };
37 +                       };
38                 };
39  
40                 gsbi@16300000 {
41 @@ -139,5 +149,33 @@
42                         pinctrl-0 = <&pcie2_pins>;
43                         pinctrl-names = "default";
44                 };
45 +
46 +               mdio0: mdio {
47 +                       compatible = "virtual,mdio-gpio";
48 +                       #address-cells = <1>;
49 +                       #size-cells = <0>;
50 +                       gpios = <&qcom_pinmux 1 0 &qcom_pinmux 0 0>;
51 +                       pinctrl-0 = <&mdio0_pins>;
52 +                       pinctrl-names = "default";
53 +
54 +                       phy0: ethernet-phy@0 {
55 +                               device_type = "ethernet-phy";
56 +                               reg = <0>;
57 +                               qca,ar8327-initvals = <
58 +                                       0x00004 0x7600000   /* PAD0_MODE */
59 +                                       0x00008 0x1000000   /* PAD5_MODE */
60 +                                       0x0000c 0x80        /* PAD6_MODE */
61 +                                       0x000e4 0xaa545     /* MAC_POWER_SEL */
62 +                                       0x000e0 0xc74164de  /* SGMII_CTRL */
63 +                                       0x0007c 0x4e        /* PORT0_STATUS */
64 +                                       0x00094 0x4e        /* PORT6_STATUS */
65 +                                       >;
66 +                       };
67 +
68 +                       phy4: ethernet-phy@4 {
69 +                               device_type = "ethernet-phy";
70 +                               reg = <4>;
71 +                       };
72 +               };
73         };
74  };
75 --- a/arch/arm/boot/dts/qcom-ipq8064-db149.dts
76 +++ b/arch/arm/boot/dts/qcom-ipq8064-db149.dts
77 @@ -16,6 +16,7 @@
78  
79         alias {
80                 serial0 = &uart2;
81 +               mdio-gpio0 = &mdio0;
82         };
83  
84         chosen {
85 @@ -62,6 +63,15 @@
86                                         bias-none;
87                                 };
88                         };
89 +
90 +                       mdio0_pins: mdio0_pins {
91 +                               mux {
92 +                                       pins = "gpio0", "gpio1";
93 +                                       function = "gpio";
94 +                                       drive-strength = <8>;
95 +                                       bias-disable;
96 +                               };
97 +                       };
98                 };
99  
100                 gsbi2: gsbi@12480000 {
101 @@ -173,5 +183,44 @@
102                         pinctrl-0 = <&pcie3_pins>;
103                         pinctrl-names = "default";
104                 };
105 +
106 +               mdio0: mdio {
107 +                       compatible = "virtual,mdio-gpio";
108 +                       #address-cells = <1>;
109 +                       #size-cells = <0>;
110 +                       gpios = <&qcom_pinmux 1 0 &qcom_pinmux 0 0>;
111 +
112 +                       pinctrl-0 = <&mdio0_pins>;
113 +                       pinctrl-names = "default";
114 +
115 +                       phy0: ethernet-phy@0 {
116 +                               device_type = "ethernet-phy";
117 +                               reg = <0>;
118 +                               qca,ar8327-initvals = <
119 +                                       0x00004 0x7600000   /* PAD0_MODE */
120 +                                       0x00008 0x1000000   /* PAD5_MODE */
121 +                                       0x0000c 0x80        /* PAD6_MODE */
122 +                                       0x000e4 0xaa545     /* MAC_POWER_SEL */
123 +                                       0x000e0 0xc74164de  /* SGMII_CTRL */
124 +                                       0x0007c 0x4e        /* PORT0_STATUS */
125 +                                       0x00094 0x4e        /* PORT6_STATUS */
126 +                               >;
127 +                       };
128 +
129 +                       phy4: ethernet-phy@4 {
130 +                               device_type = "ethernet-phy";
131 +                               reg = <4>;
132 +                       };
133 +
134 +                       phy6: ethernet-phy@6 {
135 +                               device_type = "ethernet-phy";
136 +                               reg = <6>;
137 +                       };
138 +
139 +                       phy7: ethernet-phy@7 {
140 +                               device_type = "ethernet-phy";
141 +                               reg = <7>;
142 +                       };
143 +               };
144         };
145  };