1 #include "qcom-ipq8064-v1.0.dtsi"
4 model = "Qualcomm Technologies, Inc. IPQ8064/AP-148";
5 compatible = "qcom,ipq8064-ap148", "qcom,ipq8064";
8 reg = <0x42000000 0x1e000000>;
9 device_type = "memory";
17 reg = <0x41200000 0x300000>;
23 serial0 = &gsbi4_serial;
28 stdout-path = "serial0:115200n8";
33 compatible = "virtual,mdio-gpio";
36 gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
37 <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
38 pinctrl-0 = <&mdio0_pins>;
39 pinctrl-names = "default";
41 phy0: ethernet-phy@0 {
43 qca,ar8327-initvals = <
44 0x00004 0x7600000 /* PAD0_MODE */
45 0x00008 0x1000000 /* PAD5_MODE */
46 0x0000c 0x80 /* PAD6_MODE */
47 0x000e4 0x6a545 /* MAC_POWER_SEL */
48 0x000e0 0xc74164de /* SGMII_CTRL */
49 0x0007c 0x4e /* PORT0_STATUS */
50 0x00094 0x4e /* PORT6_STATUS */
54 phy4: ethernet-phy@4 {
62 i2c4_pins: i2c4_pinmux {
63 pins = "gpio12", "gpio13";
68 nand_pins: nand_pins {
70 pins = "gpio34", "gpio35", "gpio36",
71 "gpio37", "gpio38", "gpio39",
72 "gpio40", "gpio41", "gpio42",
73 "gpio43", "gpio44", "gpio45",
76 drive-strength = <10>;
84 pins = "gpio40", "gpio41", "gpio42",
85 "gpio43", "gpio44", "gpio45",
91 mdio0_pins: mdio0_pins {
93 pins = "gpio0", "gpio1";
100 rgmii2_pins: rgmii2_pins {
102 pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
103 "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ;
105 drive-strength = <8>;
116 qcom,mode = <GSBI_PROT_I2C_UART>;
124 * The i2c device on gsbi4 should not be enabled.
125 * On ipq806x designs gsbi4 i2c is meant for exclusive
126 * RPM usage. Turning this on in kernel manifests as
127 * i2c failure for the RPM.
132 qcom,mode = <GSBI_PROT_SPI>;
137 spi-max-frequency = <50000000>;
139 pinctrl-0 = <&spi_pins>;
140 pinctrl-names = "default";
142 cs-gpios = <&qcom_pinmux 20 0>;
145 compatible = "s25fl256s1";
146 #address-cells = <1>;
148 spi-max-frequency = <50000000>;
152 compatible = "qcom,smem";
178 pinctrl-0 = <&nand_pins>;
179 pinctrl-names = "default";
183 compatible = "qcom,nandcs";
185 nand-ecc-strength = <4>;
186 nand-bus-width = <8>;
187 nand-ecc-step-size = <512>;
190 compatible = "qcom,smem";
200 pinctrl-0 = <&rgmii2_pins>;
201 pinctrl-names = "default";