package/kernel/lantiq/ltq-deu/src/ifxmips_aes.c

   1 /******************************************************************************
   2 **
   3 ** FILE NAME    : ifxmips_aes.c
   4 ** PROJECT      : IFX UEIP
   5 ** MODULES      : DEU Module
   6 **
   7 ** DATE         : September 8, 2009
   8 ** AUTHOR       : Mohammad Firdaus
   9 ** DESCRIPTION  : Data Encryption Unit Driver for AES Algorithm
  10 ** COPYRIGHT    :       Copyright (c) 2009
  11 **                      Infineon Technologies AG
  12 **                      Am Campeon 1-12, 85579 Neubiberg, Germany
  13 **
  14 **    This program is free software; you can redistribute it and/or modify
  15 **    it under the terms of the GNU General Public License as published by
  16 **    the Free Software Foundation; either version 2 of the License, or
  17 **    (at your option) any later version.
  18 **
  19 ** HISTORY
  20 ** $Date        $Author             $Comment
  21 ** 08,Sept 2009 Mohammad Firdaus    Initial UEIP release
  22 *******************************************************************************/
  23 /*!
  24  \defgroup IFX_DEU IFX_DEU_DRIVERS
  25  \ingroup API
  26  \brief ifx DEU driver module
  27 */
  28
  29 /*!
  30   \file ifxmips_aes.c
  31   \ingroup IFX_DEU
  32   \brief AES Encryption Driver main file
  33 */
  34
  35 /*!
  36  \defgroup IFX_AES_FUNCTIONS IFX_AES_FUNCTIONS
  37  \ingroup IFX_DEU
  38  \brief IFX AES driver Functions
  39 */
  40
  41
  42 /* Project Header Files */
  43 #if defined(CONFIG_MODVERSIONS)
  44 #define MODVERSIONS
  45 #include <linux/modeversions>
  46 #endif
  47
  48 #include <linux/version.h>
  49 #include <linux/module.h>
  50 #include <linux/init.h>
  51 #include <linux/proc_fs.h>
  52 #include <linux/fs.h>
  53 #include <linux/types.h>
  54 #include <linux/errno.h>
  55 #include <linux/crypto.h>
  56 #include <linux/interrupt.h>
  57 #include <linux/delay.h>
  58 #include <asm/byteorder.h>
  59 #include <crypto/algapi.h>
  60
  61 #include "ifxmips_deu.h"
  62
  63 #if defined(CONFIG_DANUBE)
  64 #include "ifxmips_deu_danube.h"
  65 extern int ifx_danube_pre_1_4;
  66 #elif defined(CONFIG_AR9)
  67 #include "ifxmips_deu_ar9.h"
  68 #elif defined(CONFIG_VR9) || defined(CONFIG_AR10)
  69 #include "ifxmips_deu_vr9.h"
  70 #else
  71 #error "Unkown platform"
  72 #endif
  73
  74 /* DMA related header and variables */
  75
  76 spinlock_t aes_lock;
  77 #define CRTCL_SECT_INIT        spin_lock_init(&aes_lock)
  78 #define CRTCL_SECT_START       spin_lock_irqsave(&aes_lock, flag)
  79 #define CRTCL_SECT_END         spin_unlock_irqrestore(&aes_lock, flag)
  80
  81 /* Definition of constants */
  82 #define AES_START   IFX_AES_CON
  83 #define AES_MIN_KEY_SIZE    16
  84 #define AES_MAX_KEY_SIZE    32
  85 #define AES_BLOCK_SIZE      16
  86 #define CTR_RFC3686_NONCE_SIZE    4
  87 #define CTR_RFC3686_IV_SIZE       8
  88 #define CTR_RFC3686_MAX_KEY_SIZE  (AES_MAX_KEY_SIZE + CTR_RFC3686_NONCE_SIZE)
  89
  90 #ifdef CRYPTO_DEBUG
  91 extern char debug_level;
  92 #define DPRINTF(level, format, args...) if (level < debug_level) printk(KERN_INFO "[%s %s %d]: " format, __FILE__, __func__, __LINE__, ##args);
  93 #else
  94 #define DPRINTF(level, format, args...)
  95 #endif /* CRYPTO_DEBUG */
  96
  97 /* Function decleration */
  98 int aes_chip_init(void);
  99 u32 endian_swap(u32 input);
 100 u32 input_swap(u32 input);
 101 u32* memory_alignment(const u8 *arg, u32 *buff_alloc, int in_out, int nbytes);
 102 void aes_dma_memory_copy(u32 *outcopy, u32 *out_dma, u8 *out_arg, int nbytes);
 103 void des_dma_memory_copy(u32 *outcopy, u32 *out_dma, u8 *out_arg, int nbytes);
 104 int aes_memory_allocate(int value);
 105 int des_memory_allocate(int value);
 106 void memory_release(u32 *addr);
 107
 108
 109 extern void ifx_deu_aes (void *ctx_arg, uint8_t *out_arg, const uint8_t *in_arg,
 110         uint8_t *iv_arg, size_t nbytes, int encdec, int mode);
 111 /* End of function decleration */
 112
 113 struct aes_ctx {
 114     int key_length;
 115     u32 buf[AES_MAX_KEY_SIZE];
 116     u8 nonce[CTR_RFC3686_NONCE_SIZE];
 117 };
 118
 119 extern int disable_deudma;
 120 extern int disable_multiblock;
 121
 122 /*! \fn int aes_set_key (struct crypto_tfm *tfm, const uint8_t *in_key, unsigned int key_len)
 123  *  \ingroup IFX_AES_FUNCTIONS
 124  *  \brief sets the AES keys
 125  *  \param tfm linux crypto algo transform
 126  *  \param in_key input key
 127  *  \param key_len key lengths of 16, 24 and 32 bytes supported
 128  *  \return -EINVAL - bad key length, 0 - SUCCESS
 129 */
 130 int aes_set_key (struct crypto_tfm *tfm, const u8 *in_key, unsigned int key_len)
 131 {
 132     struct aes_ctx *ctx = crypto_tfm_ctx(tfm);
 133     unsigned long *flags = (unsigned long *) &tfm->crt_flags;
 134
 135     //printk("set_key in %s\n", __FILE__);
 136
 137     //aes_chip_init();
 138
 139     if (key_len != 16 && key_len != 24 && key_len != 32) {
 140         *flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
 141         return -EINVAL;
 142     }
 143
 144     ctx->key_length = key_len;
 145     DPRINTF(0, "ctx @%p, key_len %d, ctx->key_length %d\n", ctx, key_len, ctx->key_length);
 146     memcpy ((u8 *) (ctx->buf), in_key, key_len);
 147
 148     return 0;
 149 }
 150
 151
 152 /*! \fn void ifx_deu_aes (void *ctx_arg, u8 *out_arg, const u8 *in_arg, u8 *iv_arg, size_t nbytes, int encdec, int mode)
 153  *  \ingroup IFX_AES_FUNCTIONS
 154  *  \brief main interface to AES hardware
 155  *  \param ctx_arg crypto algo context
 156  *  \param out_arg output bytestream
 157  *  \param in_arg input bytestream
 158  *  \param iv_arg initialization vector
 159  *  \param nbytes length of bytestream
 160  *  \param encdec 1 for encrypt; 0 for decrypt
 161  *  \param mode operation mode such as ebc, cbc, ctr
 162  *
 163 */
 164 void ifx_deu_aes (void *ctx_arg, u8 *out_arg, const u8 *in_arg,
 165         u8 *iv_arg, size_t nbytes, int encdec, int mode)
 166
 167 {
 168     /*~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ */
 169     volatile struct aes_t *aes = (volatile struct aes_t *) AES_START;
 170     struct aes_ctx *ctx = (struct aes_ctx *)ctx_arg;
 171     u32 *in_key = ctx->buf;
 172     unsigned long flag;
 173     /*~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ */
 174     int key_len = ctx->key_length;
 175
 176     int i = 0;
 177     int byte_cnt = nbytes;
 178
 179
 180     CRTCL_SECT_START;
 181     /* 128, 192 or 256 bit key length */
 182     aes->controlr.K = key_len / 8 - 2;
 183         if (key_len == 128 / 8) {
 184         aes->K3R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 0));
 185         aes->K2R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 1));
 186         aes->K1R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 2));
 187         aes->K0R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 3));
 188     }
 189     else if (key_len == 192 / 8) {
 190         aes->K5R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 0));
 191         aes->K4R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 1));
 192         aes->K3R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 2));
 193         aes->K2R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 3));
 194         aes->K1R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 4));
 195         aes->K0R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 5));
 196     }
 197     else if (key_len == 256 / 8) {
 198         aes->K7R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 0));
 199         aes->K6R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 1));
 200         aes->K5R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 2));
 201         aes->K4R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 3));
 202         aes->K3R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 4));
 203         aes->K2R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 5));
 204         aes->K1R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 6));
 205         aes->K0R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 7));
 206     }
 207     else {
 208         printk (KERN_ERR "[%s %s %d]: Invalid key_len : %d\n", __FILE__, __func__, __LINE__, key_len);
 209         CRTCL_SECT_END;
 210         return;// -EINVAL;
 211     }
 212
 213     /* let HW pre-process DEcryption key in any case (even if
 214        ENcryption is used). Key Valid (KV) bit is then only
 215        checked in decryption routine! */
 216     aes->controlr.PNK = 1;
 217
 218
 219     aes->controlr.E_D = !encdec;    //encryption
 220     aes->controlr.O = mode; //0 ECB 1 CBC 2 OFB 3 CFB 4 CTR
 221
 222     //aes->controlr.F = 128; //default; only for CFB and OFB modes; change only for customer-specific apps
 223     if (mode > 0) {
 224         aes->IV3R = DEU_ENDIAN_SWAP(*(u32 *) iv_arg);
 225         aes->IV2R = DEU_ENDIAN_SWAP(*((u32 *) iv_arg + 1));
 226         aes->IV1R = DEU_ENDIAN_SWAP(*((u32 *) iv_arg + 2));
 227         aes->IV0R = DEU_ENDIAN_SWAP(*((u32 *) iv_arg + 3));
 228     };
 229
 230
 231     i = 0;
 232     while (byte_cnt >= 16) {
 233
 234         aes->ID3R = INPUT_ENDIAN_SWAP(*((u32 *) in_arg + (i * 4) + 0));
 235         aes->ID2R = INPUT_ENDIAN_SWAP(*((u32 *) in_arg + (i * 4) + 1));
 236         aes->ID1R = INPUT_ENDIAN_SWAP(*((u32 *) in_arg + (i * 4) + 2));
 237         aes->ID0R = INPUT_ENDIAN_SWAP(*((u32 *) in_arg + (i * 4) + 3));    /* start crypto */
 238
 239         while (aes->controlr.BUS) {
 240             // this will not take long
 241         }
 242
 243         *((volatile u32 *) out_arg + (i * 4) + 0) = aes->OD3R;
 244         *((volatile u32 *) out_arg + (i * 4) + 1) = aes->OD2R;
 245         *((volatile u32 *) out_arg + (i * 4) + 2) = aes->OD1R;
 246         *((volatile u32 *) out_arg + (i * 4) + 3) = aes->OD0R;
 247
 248         i++;
 249         byte_cnt -= 16;
 250     }
 251
 252     /* To handle all non-aligned bytes (not aligned to 16B size) */
 253     if (byte_cnt) {
 254         aes->ID3R = INPUT_ENDIAN_SWAP(*((u32 *) in_arg + (i * 4) + 0));
 255         aes->ID2R = INPUT_ENDIAN_SWAP(*((u32 *) in_arg + (i * 4) + 1));
 256         aes->ID1R = INPUT_ENDIAN_SWAP(*((u32 *) in_arg + (i * 4) + 2));
 257         aes->ID0R = INPUT_ENDIAN_SWAP(*((u32 *) in_arg + (i * 4) + 3));    /* start crypto */
 258
 259         while (aes->controlr.BUS) {
 260         }
 261
 262         *((volatile u32 *) out_arg + (i * 4) + 0) = aes->OD3R;
 263         *((volatile u32 *) out_arg + (i * 4) + 1) = aes->OD2R;
 264         *((volatile u32 *) out_arg + (i * 4) + 2) = aes->OD1R;
 265         *((volatile u32 *) out_arg + (i * 4) + 3) = aes->OD0R;
 266
 267         /* to ensure that the extended pages are clean */
 268         memset (out_arg + (i * 16) + (nbytes % AES_BLOCK_SIZE), 0,
 269                 (AES_BLOCK_SIZE - (nbytes % AES_BLOCK_SIZE)));
 270
 271     }
 272
 273     //tc.chen : copy iv_arg back
 274     if (mode > 0) {
 275         *((u32 *) iv_arg) = DEU_ENDIAN_SWAP(aes->IV3R);
 276         *((u32 *) iv_arg + 1) = DEU_ENDIAN_SWAP(aes->IV2R);
 277         *((u32 *) iv_arg + 2) = DEU_ENDIAN_SWAP(aes->IV1R);
 278         *((u32 *) iv_arg + 3) = DEU_ENDIAN_SWAP(aes->IV0R);
 279     }
 280
 281     CRTCL_SECT_END;
 282 }
 283
 284 /*!
 285  *  \fn int ctr_rfc3686_aes_set_key (struct crypto_tfm *tfm, const uint8_t *in_key, unsigned int key_len)
 286  *  \ingroup IFX_AES_FUNCTIONS
 287  *  \brief sets RFC3686 key
 288  *  \param tfm linux crypto algo transform
 289  *  \param in_key input key
 290  *  \param key_len key lengths of 20, 28 and 36 bytes supported; last 4 bytes is nonce
 291  *  \return 0 - SUCCESS
 292  *          -EINVAL - bad key length
 293 */
 294 int ctr_rfc3686_aes_set_key (struct crypto_tfm *tfm, const uint8_t *in_key, unsigned int key_len)
 295 {
 296     struct aes_ctx *ctx = crypto_tfm_ctx(tfm);
 297     unsigned long *flags = (unsigned long *)&tfm->crt_flags;
 298
 299     //printk("ctr_rfc3686_aes_set_key in %s\n", __FILE__);
 300
 301     memcpy(ctx->nonce, in_key + (key_len - CTR_RFC3686_NONCE_SIZE),
 302            CTR_RFC3686_NONCE_SIZE);
 303
 304     key_len -= CTR_RFC3686_NONCE_SIZE; // remove 4 bytes of nonce
 305
 306     if (key_len != 16 && key_len != 24 && key_len != 32) {
 307         *flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
 308         return -EINVAL;
 309     }
 310
 311     ctx->key_length = key_len;
 312
 313     memcpy ((u8 *) (ctx->buf), in_key, key_len);
 314
 315     return 0;
 316 }
 317
 318 /*! \fn void ifx_deu_aes (void *ctx_arg, u8 *out_arg, const u8 *in_arg, u8 *iv_arg, u32 nbytes, int encdec, int mode)
 319  *  \ingroup IFX_AES_FUNCTIONS
 320  *  \brief main interface with deu hardware in DMA mode
 321  *  \param ctx_arg crypto algo context
 322  *  \param out_arg output bytestream
 323  *  \param in_arg input bytestream
 324  *  \param iv_arg initialization vector
 325  *  \param nbytes length of bytestream
 326  *  \param encdec 1 for encrypt; 0 for decrypt
 327  *  \param mode operation mode such as ebc, cbc, ctr
 328 */
 329
 330
 331 //definitions from linux/include/crypto.h:
 332 //#define CRYPTO_TFM_MODE_ECB       0x00000001
 333 //#define CRYPTO_TFM_MODE_CBC       0x00000002
 334 //#define CRYPTO_TFM_MODE_CFB       0x00000004
 335 //#define CRYPTO_TFM_MODE_CTR       0x00000008
 336 //#define CRYPTO_TFM_MODE_OFB       0x00000010 // not even defined
 337 //but hardware definition: 0 ECB 1 CBC 2 OFB 3 CFB 4 CTR
 338
 339 /*! \fn void ifx_deu_aes_ecb (void *ctx, uint8_t *dst, const uint8_t *src, uint8_t *iv, size_t nbytes, int encdec, int inplace)
 340  *  \ingroup IFX_AES_FUNCTIONS
 341  *  \brief sets AES hardware to ECB mode
 342  *  \param ctx crypto algo context
 343  *  \param dst output bytestream
 344  *  \param src input bytestream
 345  *  \param iv initialization vector
 346  *  \param nbytes length of bytestream
 347  *  \param encdec 1 for encrypt; 0 for decrypt
 348  *  \param inplace not used
 349 */
 350 void ifx_deu_aes_ecb (void *ctx, uint8_t *dst, const uint8_t *src,
 351         uint8_t *iv, size_t nbytes, int encdec, int inplace)
 352 {
 353      ifx_deu_aes (ctx, dst, src, NULL, nbytes, encdec, 0);
 354 }
 355
 356 /*! \fn void ifx_deu_aes_cbc (void *ctx, uint8_t *dst, const uint8_t *src, uint8_t *iv, size_t nbytes, int encdec, int inplace)
 357  *  \ingroup IFX_AES_FUNCTIONS
 358  *  \brief sets AES hardware to CBC mode
 359  *  \param ctx crypto algo context
 360  *  \param dst output bytestream
 361  *  \param src input bytestream
 362  *  \param iv initialization vector
 363  *  \param nbytes length of bytestream
 364  *  \param encdec 1 for encrypt; 0 for decrypt
 365  *  \param inplace not used
 366 */
 367 void ifx_deu_aes_cbc (void *ctx, uint8_t *dst, const uint8_t *src,
 368         uint8_t *iv, size_t nbytes, int encdec, int inplace)
 369 {
 370      ifx_deu_aes (ctx, dst, src, iv, nbytes, encdec, 1);
 371 }
 372
 373 /*! \fn void ifx_deu_aes_ofb (void *ctx, uint8_t *dst, const uint8_t *src, uint8_t *iv, size_t nbytes, int encdec, int inplace)
 374  *  \ingroup IFX_AES_FUNCTIONS
 375  *  \brief sets AES hardware to OFB mode
 376  *  \param ctx crypto algo context
 377  *  \param dst output bytestream
 378  *  \param src input bytestream
 379  *  \param iv initialization vector
 380  *  \param nbytes length of bytestream
 381  *  \param encdec 1 for encrypt; 0 for decrypt
 382  *  \param inplace not used
 383 */
 384 void ifx_deu_aes_ofb (void *ctx, uint8_t *dst, const uint8_t *src,
 385         uint8_t *iv, size_t nbytes, int encdec, int inplace)
 386 {
 387      ifx_deu_aes (ctx, dst, src, iv, nbytes, encdec, 2);
 388 }
 389
 390 /*! \fn void ifx_deu_aes_cfb (void *ctx, uint8_t *dst, const uint8_t *src, uint8_t *iv, size_t nbytes, int encdec, int inplace)
 391  *  \ingroup IFX_AES_FUNCTIONS
 392  *  \brief sets AES hardware to CFB mode
 393  *  \param ctx crypto algo context
 394  *  \param dst output bytestream
 395  *  \param src input bytestream
 396  *  \param iv initialization vector
 397  *  \param nbytes length of bytestream
 398  *  \param encdec 1 for encrypt; 0 for decrypt
 399  *  \param inplace not used
 400 */
 401 void ifx_deu_aes_cfb (void *ctx, uint8_t *dst, const uint8_t *src,
 402         uint8_t *iv, size_t nbytes, int encdec, int inplace)
 403 {
 404      ifx_deu_aes (ctx, dst, src, iv, nbytes, encdec, 3);
 405 }
 406
 407 /*! \fn void ifx_deu_aes_ctr (void *ctx, uint8_t *dst, const uint8_t *src, uint8_t *iv, size_t nbytes, int encdec, int inplace)
 408  *  \ingroup IFX_AES_FUNCTIONS
 409  *  \brief sets AES hardware to CTR mode
 410  *  \param ctx crypto algo context
 411  *  \param dst output bytestream
 412  *  \param src input bytestream
 413  *  \param iv initialization vector
 414  *  \param nbytes length of bytestream
 415  *  \param encdec 1 for encrypt; 0 for decrypt
 416  *  \param inplace not used
 417 */
 418 void ifx_deu_aes_ctr (void *ctx, uint8_t *dst, const uint8_t *src,
 419         uint8_t *iv, size_t nbytes, int encdec, int inplace)
 420 {
 421      ifx_deu_aes (ctx, dst, src, iv, nbytes, encdec, 4);
 422 }
 423
 424 /*! \fn void aes_encrypt (struct crypto_tfm *tfm, uint8_t *out, const uint8_t *in)
 425  *  \ingroup IFX_AES_FUNCTIONS
 426  *  \brief encrypt AES_BLOCK_SIZE of data
 427  *  \param tfm linux crypto algo transform
 428  *  \param out output bytestream
 429  *  \param in input bytestream
 430 */
 431 void aes_encrypt (struct crypto_tfm *tfm, uint8_t *out, const uint8_t *in)
 432 {
 433     struct aes_ctx *ctx = crypto_tfm_ctx(tfm);
 434     ifx_deu_aes (ctx, out, in, NULL, AES_BLOCK_SIZE,
 435             CRYPTO_DIR_ENCRYPT, 0);
 436 }
 437
 438 /*! \fn void aes_decrypt (struct crypto_tfm *tfm, uint8_t *out, const uint8_t *in)
 439  *  \ingroup IFX_AES_FUNCTIONS
 440  *  \brief decrypt AES_BLOCK_SIZE of data
 441  *  \param tfm linux crypto algo transform
 442  *  \param out output bytestream
 443  *  \param in input bytestream
 444 */
 445 void aes_decrypt (struct crypto_tfm *tfm, uint8_t *out, const uint8_t *in)
 446 {
 447     struct aes_ctx *ctx = crypto_tfm_ctx(tfm);
 448     ifx_deu_aes (ctx, out, in, NULL, AES_BLOCK_SIZE,
 449             CRYPTO_DIR_DECRYPT, 0);
 450 }
 451
 452 /*
 453  * \brief AES function mappings
 454 */
 455 struct crypto_alg ifxdeu_aes_alg = {
 456     .cra_name       =   "aes",
 457     .cra_driver_name    =   "ifxdeu-aes",
 458     .cra_flags      =   CRYPTO_ALG_TYPE_CIPHER,
 459     .cra_blocksize      =   AES_BLOCK_SIZE,
 460     .cra_ctxsize        =   sizeof(struct aes_ctx),
 461     .cra_module     =   THIS_MODULE,
 462     .cra_list       =   LIST_HEAD_INIT(ifxdeu_aes_alg.cra_list),
 463     .cra_u          =   {
 464         .cipher = {
 465             .cia_min_keysize    =   AES_MIN_KEY_SIZE,
 466             .cia_max_keysize    =   AES_MAX_KEY_SIZE,
 467             .cia_setkey     =   aes_set_key,
 468             .cia_encrypt        =   aes_encrypt,
 469             .cia_decrypt        =   aes_decrypt,
 470         }
 471     }
 472 };
 473
 474 /*! \fn int ecb_aes_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst, struct scatterlist *src, unsigned int nbytes)
 475  *  \ingroup IFX_AES_FUNCTIONS
 476  *  \brief ECB AES encrypt using linux crypto blkcipher
 477  *  \param desc blkcipher descriptor
 478  *  \param dst output scatterlist
 479  *  \param src input scatterlist
 480  *  \param nbytes data size in bytes
 481  *  \return err
 482 */
 483 int ecb_aes_encrypt(struct blkcipher_desc *desc,
 484                struct scatterlist *dst, struct scatterlist *src,
 485                unsigned int nbytes)
 486 {
 487     struct aes_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
 488     struct blkcipher_walk walk;
 489     int err;
 490     unsigned int enc_bytes;
 491
 492     blkcipher_walk_init(&walk, dst, src, nbytes);
 493     err = blkcipher_walk_virt(desc, &walk);
 494
 495     while ((nbytes = enc_bytes = walk.nbytes)) {
 496             enc_bytes -= (nbytes % AES_BLOCK_SIZE);
 497         ifx_deu_aes_ecb(ctx, walk.dst.virt.addr, walk.src.virt.addr,
 498                        NULL, enc_bytes, CRYPTO_DIR_ENCRYPT, 0);
 499                 nbytes &= AES_BLOCK_SIZE - 1;
 500         err = blkcipher_walk_done(desc, &walk, nbytes);
 501     }
 502
 503     return err;
 504 }
 505
 506 /*! \fn int ecb_aes_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst, struct scatterlist *src, unsigned int nbytes)
 507  *  \ingroup IFX_AES_FUNCTIONS
 508  *  \brief ECB AES decrypt using linux crypto blkcipher
 509  *  \param desc blkcipher descriptor
 510  *  \param dst output scatterlist
 511  *  \param src input scatterlist
 512  *  \param nbytes data size in bytes
 513  *  \return err
 514 */
 515 int ecb_aes_decrypt(struct blkcipher_desc *desc,
 516                struct scatterlist *dst, struct scatterlist *src,
 517                unsigned int nbytes)
 518 {
 519     struct aes_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
 520     struct blkcipher_walk walk;
 521     int err;
 522     unsigned int dec_bytes;
 523
 524     blkcipher_walk_init(&walk, dst, src, nbytes);
 525     err = blkcipher_walk_virt(desc, &walk);
 526
 527     while ((nbytes = dec_bytes = walk.nbytes)) {
 528             dec_bytes -= (nbytes % AES_BLOCK_SIZE);
 529         ifx_deu_aes_ecb(ctx, walk.dst.virt.addr, walk.src.virt.addr,
 530                        NULL, dec_bytes, CRYPTO_DIR_DECRYPT, 0);
 531         nbytes &= AES_BLOCK_SIZE - 1;
 532         err = blkcipher_walk_done(desc, &walk, nbytes);
 533     }
 534
 535     return err;
 536 }
 537
 538 /*
 539  * \brief AES function mappings
 540 */
 541 struct crypto_alg ifxdeu_ecb_aes_alg = {
 542     .cra_name       =   "ecb(aes)",
 543     .cra_driver_name    =   "ifxdeu-ecb(aes)",
 544     .cra_flags      =   CRYPTO_ALG_TYPE_BLKCIPHER,
 545     .cra_blocksize      =   AES_BLOCK_SIZE,
 546     .cra_ctxsize        =   sizeof(struct aes_ctx),
 547     .cra_type       =   &crypto_blkcipher_type,
 548     .cra_module     =   THIS_MODULE,
 549     .cra_list       =   LIST_HEAD_INIT(ifxdeu_ecb_aes_alg.cra_list),
 550     .cra_u          =   {
 551         .blkcipher = {
 552             .min_keysize        =   AES_MIN_KEY_SIZE,
 553             .max_keysize        =   AES_MAX_KEY_SIZE,
 554             .setkey         =   aes_set_key,
 555             .encrypt        =   ecb_aes_encrypt,
 556             .decrypt        =   ecb_aes_decrypt,
 557         }
 558     }
 559 };
 560
 561
 562 /*! \fn int cbc_aes_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst, struct scatterlist *src, unsigned int nbytes)
 563  *  \ingroup IFX_AES_FUNCTIONS
 564  *  \brief CBC AES encrypt using linux crypto blkcipher
 565  *  \param desc blkcipher descriptor
 566  *  \param dst output scatterlist
 567  *  \param src input scatterlist
 568  *  \param nbytes data size in bytes
 569  *  \return err
 570 */
 571 int cbc_aes_encrypt(struct blkcipher_desc *desc,
 572                struct scatterlist *dst, struct scatterlist *src,
 573                unsigned int nbytes)
 574 {
 575     struct aes_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
 576     struct blkcipher_walk walk;
 577     int err;
 578     unsigned int enc_bytes;
 579
 580     blkcipher_walk_init(&walk, dst, src, nbytes);
 581     err = blkcipher_walk_virt(desc, &walk);
 582
 583     while ((nbytes = enc_bytes = walk.nbytes)) {
 584             u8 *iv = walk.iv;
 585             enc_bytes -= (nbytes % AES_BLOCK_SIZE);
 586             ifx_deu_aes_cbc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
 587                        iv, enc_bytes, CRYPTO_DIR_ENCRYPT, 0);
 588         nbytes &= AES_BLOCK_SIZE - 1;
 589         err = blkcipher_walk_done(desc, &walk, nbytes);
 590     }
 591
 592     return err;
 593 }
 594
 595 /*! \fn int cbc_aes_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst, struct scatterlist *src, unsigned int nbytes)
 596  *  \ingroup IFX_AES_FUNCTIONS
 597  *  \brief CBC AES decrypt using linux crypto blkcipher
 598  *  \param desc blkcipher descriptor
 599  *  \param dst output scatterlist
 600  *  \param src input scatterlist
 601  *  \param nbytes data size in bytes
 602  *  \return err
 603 */
 604 int cbc_aes_decrypt(struct blkcipher_desc *desc,
 605                struct scatterlist *dst, struct scatterlist *src,
 606                unsigned int nbytes)
 607 {
 608     struct aes_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
 609     struct blkcipher_walk walk;
 610     int err;
 611     unsigned int dec_bytes;
 612
 613     blkcipher_walk_init(&walk, dst, src, nbytes);
 614     err = blkcipher_walk_virt(desc, &walk);
 615
 616     while ((nbytes = dec_bytes = walk.nbytes)) {
 617         u8 *iv = walk.iv;
 618             dec_bytes -= (nbytes % AES_BLOCK_SIZE);
 619             ifx_deu_aes_cbc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
 620                        iv, dec_bytes, CRYPTO_DIR_DECRYPT, 0);
 621         nbytes &= AES_BLOCK_SIZE - 1;
 622         err = blkcipher_walk_done(desc, &walk, nbytes);
 623     }
 624
 625     return err;
 626 }
 627
 628 /*
 629  * \brief AES function mappings
 630 */
 631 struct crypto_alg ifxdeu_cbc_aes_alg = {
 632     .cra_name       =   "cbc(aes)",
 633     .cra_driver_name    =   "ifxdeu-cbc(aes)",
 634     .cra_flags      =   CRYPTO_ALG_TYPE_BLKCIPHER,
 635     .cra_blocksize      =   AES_BLOCK_SIZE,
 636     .cra_ctxsize        =   sizeof(struct aes_ctx),
 637     .cra_type       =   &crypto_blkcipher_type,
 638     .cra_module     =   THIS_MODULE,
 639     .cra_list       =   LIST_HEAD_INIT(ifxdeu_cbc_aes_alg.cra_list),
 640     .cra_u          =   {
 641         .blkcipher = {
 642             .min_keysize        =   AES_MIN_KEY_SIZE,
 643             .max_keysize        =   AES_MAX_KEY_SIZE,
 644             .ivsize         =   AES_BLOCK_SIZE,
 645             .setkey         =   aes_set_key,
 646             .encrypt        =   cbc_aes_encrypt,
 647             .decrypt        =   cbc_aes_decrypt,
 648         }
 649     }
 650 };
 651
 652
 653 /*! \fn int ctr_basic_aes_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst, struct scatterlist *src, unsigned int nbytes)
 654  *  \ingroup IFX_AES_FUNCTIONS
 655  *  \brief Counter mode AES encrypt using linux crypto blkcipher
 656  *  \param desc blkcipher descriptor
 657  *  \param dst output scatterlist
 658  *  \param src input scatterlist
 659  *  \param nbytes data size in bytes
 660  *  \return err
 661 */
 662 int ctr_basic_aes_encrypt(struct blkcipher_desc *desc,
 663                struct scatterlist *dst, struct scatterlist *src,
 664                unsigned int nbytes)
 665 {
 666     struct aes_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
 667     struct blkcipher_walk walk;
 668     int err;
 669     unsigned int enc_bytes;
 670
 671     blkcipher_walk_init(&walk, dst, src, nbytes);
 672     err = blkcipher_walk_virt(desc, &walk);
 673
 674     while ((nbytes = enc_bytes = walk.nbytes)) {
 675             u8 *iv = walk.iv;
 676             enc_bytes -= (nbytes % AES_BLOCK_SIZE);
 677             ifx_deu_aes_ctr(ctx, walk.dst.virt.addr, walk.src.virt.addr,
 678                        iv, enc_bytes, CRYPTO_DIR_ENCRYPT, 0);
 679         nbytes &= AES_BLOCK_SIZE - 1;
 680         err = blkcipher_walk_done(desc, &walk, nbytes);
 681     }
 682
 683     return err;
 684 }
 685
 686 /*! \fn  int ctr_basic_aes_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst, struct scatterlist *src, unsigned int nbytes)
 687  *  \ingroup IFX_AES_FUNCTIONS
 688  *  \brief Counter mode AES decrypt using linux crypto blkcipher
 689  *  \param desc blkcipher descriptor
 690  *  \param dst output scatterlist
 691  *  \param src input scatterlist
 692  *  \param nbytes data size in bytes
 693  *  \return err
 694 */
 695 int ctr_basic_aes_decrypt(struct blkcipher_desc *desc,
 696                struct scatterlist *dst, struct scatterlist *src,
 697                unsigned int nbytes)
 698 {
 699     struct aes_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
 700     struct blkcipher_walk walk;
 701     int err;
 702     unsigned int dec_bytes;
 703
 704     blkcipher_walk_init(&walk, dst, src, nbytes);
 705     err = blkcipher_walk_virt(desc, &walk);
 706
 707     while ((nbytes = dec_bytes = walk.nbytes)) {
 708         u8 *iv = walk.iv;
 709             dec_bytes -= (nbytes % AES_BLOCK_SIZE);
 710             ifx_deu_aes_ctr(ctx, walk.dst.virt.addr, walk.src.virt.addr,
 711                        iv, dec_bytes, CRYPTO_DIR_DECRYPT, 0);
 712         nbytes &= AES_BLOCK_SIZE - 1;
 713         err = blkcipher_walk_done(desc, &walk, nbytes);
 714     }
 715
 716     return err;
 717 }
 718
 719 /*
 720  * \brief AES function mappings
 721 */
 722 struct crypto_alg ifxdeu_ctr_basic_aes_alg = {
 723     .cra_name       =   "ctr(aes)",
 724     .cra_driver_name    =   "ifxdeu-ctr(aes)",
 725     .cra_flags      =   CRYPTO_ALG_TYPE_BLKCIPHER,
 726     .cra_blocksize      =   AES_BLOCK_SIZE,
 727     .cra_ctxsize        =   sizeof(struct aes_ctx),
 728     .cra_type       =   &crypto_blkcipher_type,
 729     .cra_module     =   THIS_MODULE,
 730     .cra_list       =   LIST_HEAD_INIT(ifxdeu_ctr_basic_aes_alg.cra_list),
 731     .cra_u          =   {
 732         .blkcipher = {
 733             .min_keysize        =   AES_MIN_KEY_SIZE,
 734             .max_keysize        =   AES_MAX_KEY_SIZE,
 735             .ivsize         =   AES_BLOCK_SIZE,
 736             .setkey         =   aes_set_key,
 737             .encrypt        =   ctr_basic_aes_encrypt,
 738             .decrypt        =   ctr_basic_aes_decrypt,
 739         }
 740     }
 741 };
 742
 743
 744 /*! \fn  int ctr_rfc3686_aes_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst, struct scatterlist *src, unsigned int nbytes)
 745  *  \ingroup IFX_AES_FUNCTIONS
 746  *  \brief Counter mode AES (rfc3686) encrypt using linux crypto blkcipher
 747  *  \param desc blkcipher descriptor
 748  *  \param dst output scatterlist
 749  *  \param src input scatterlist
 750  *  \param nbytes data size in bytes
 751  *  \return err
 752 */
 753 int ctr_rfc3686_aes_encrypt(struct blkcipher_desc *desc,
 754                struct scatterlist *dst, struct scatterlist *src,
 755                unsigned int nbytes)
 756 {
 757     struct aes_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
 758     struct blkcipher_walk walk;
 759     int err, bsize = nbytes;
 760     u8 rfc3686_iv[16];
 761
 762     blkcipher_walk_init(&walk, dst, src, nbytes);
 763     err = blkcipher_walk_virt(desc, &walk);
 764
 765     /* set up counter block */
 766     memcpy(rfc3686_iv, ctx->nonce, CTR_RFC3686_NONCE_SIZE);
 767     memcpy(rfc3686_iv + CTR_RFC3686_NONCE_SIZE, walk.iv, CTR_RFC3686_IV_SIZE);
 768
 769     /* initialize counter portion of counter block */
 770     *(__be32 *)(rfc3686_iv + CTR_RFC3686_NONCE_SIZE + CTR_RFC3686_IV_SIZE) =
 771         cpu_to_be32(1);
 772
 773     /* scatterlist source is the same size as request size, just process once */
 774     if (nbytes == walk.nbytes) {
 775         ifx_deu_aes_ctr(ctx, walk.dst.virt.addr, walk.src.virt.addr,
 776                         rfc3686_iv, nbytes, CRYPTO_DIR_ENCRYPT, 0);
 777         nbytes -= walk.nbytes;
 778         err = blkcipher_walk_done(desc, &walk, nbytes);
 779         return err;
 780     }
 781
 782     while ((nbytes = walk.nbytes) && (walk.nbytes >= AES_BLOCK_SIZE)) {
 783         ifx_deu_aes_ctr(ctx, walk.dst.virt.addr, walk.src.virt.addr,
 784                         rfc3686_iv, nbytes, CRYPTO_DIR_ENCRYPT, 0);
 785
 786         nbytes -= walk.nbytes;
 787         bsize -= walk.nbytes;
 788         err = blkcipher_walk_done(desc, &walk, nbytes);
 789     }
 790
 791     /* to handle remaining bytes < AES_BLOCK_SIZE */
 792     if (walk.nbytes) {
 793         ifx_deu_aes_ctr(ctx, walk.dst.virt.addr, walk.src.virt.addr,
 794                         rfc3686_iv, walk.nbytes, CRYPTO_DIR_ENCRYPT, 0);
 795         err = blkcipher_walk_done(desc, &walk, 0);
 796     }
 797
 798     return err;
 799 }
 800
 801 /*! \fn int ctr_rfc3686_aes_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst, struct scatterlist *src, unsigned int nbytes)
 802  *  \ingroup IFX_AES_FUNCTIONS
 803  *  \brief Counter mode AES (rfc3686) decrypt using linux crypto blkcipher
 804  *  \param desc blkcipher descriptor
 805  *  \param dst output scatterlist
 806  *  \param src input scatterlist
 807  *  \param nbytes data size in bytes
 808  *  \return err
 809 */
 810 int ctr_rfc3686_aes_decrypt(struct blkcipher_desc *desc,
 811                struct scatterlist *dst, struct scatterlist *src,
 812                unsigned int nbytes)
 813 {
 814     struct aes_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
 815     struct blkcipher_walk walk;
 816     int err, bsize = nbytes;
 817     u8 rfc3686_iv[16];
 818
 819     blkcipher_walk_init(&walk, dst, src, nbytes);
 820     err = blkcipher_walk_virt(desc, &walk);
 821
 822     /* set up counter block */
 823     memcpy(rfc3686_iv, ctx->nonce, CTR_RFC3686_NONCE_SIZE);
 824     memcpy(rfc3686_iv + CTR_RFC3686_NONCE_SIZE, walk.iv, CTR_RFC3686_IV_SIZE);
 825
 826     /* initialize counter portion of counter block */
 827     *(__be32 *)(rfc3686_iv + CTR_RFC3686_NONCE_SIZE + CTR_RFC3686_IV_SIZE) =
 828         cpu_to_be32(1);
 829
 830     /* scatterlist source is the same size as request size, just process once */
 831     if (nbytes == walk.nbytes) {
 832         ifx_deu_aes_ctr(ctx, walk.dst.virt.addr, walk.src.virt.addr,
 833                         rfc3686_iv, nbytes, CRYPTO_DIR_ENCRYPT, 0);
 834         nbytes -= walk.nbytes;
 835         err = blkcipher_walk_done(desc, &walk, nbytes);
 836         return err;
 837     }
 838
 839     while ((nbytes = walk.nbytes) % (walk.nbytes >= AES_BLOCK_SIZE)) {
 840         ifx_deu_aes_ctr(ctx, walk.dst.virt.addr, walk.src.virt.addr,
 841                         rfc3686_iv, nbytes, CRYPTO_DIR_DECRYPT, 0);
 842
 843         nbytes -= walk.nbytes;
 844         bsize -= walk.nbytes;
 845         err = blkcipher_walk_done(desc, &walk, nbytes);
 846     }
 847
 848     /* to handle remaining bytes < AES_BLOCK_SIZE */
 849     if (walk.nbytes) {
 850         ifx_deu_aes_ctr(ctx, walk.dst.virt.addr, walk.src.virt.addr,
 851                         rfc3686_iv, walk.nbytes, CRYPTO_DIR_ENCRYPT, 0);
 852         err = blkcipher_walk_done(desc, &walk, 0);
 853     }
 854
 855     return err;
 856 }
 857
 858 /*
 859  * \brief AES function mappings
 860 */
 861 struct crypto_alg ifxdeu_ctr_rfc3686_aes_alg = {
 862     .cra_name           =   "rfc3686(ctr(aes))",
 863     .cra_driver_name    =   "ifxdeu-ctr-rfc3686(aes)",
 864     .cra_flags          =   CRYPTO_ALG_TYPE_BLKCIPHER,
 865     .cra_blocksize      =   AES_BLOCK_SIZE,
 866     .cra_ctxsize        =   sizeof(struct aes_ctx),
 867     .cra_type           =   &crypto_blkcipher_type,
 868     .cra_module         =   THIS_MODULE,
 869     .cra_list           =   LIST_HEAD_INIT(ifxdeu_ctr_rfc3686_aes_alg.cra_list),
 870     .cra_u          =   {
 871         .blkcipher = {
 872             .min_keysize        =   AES_MIN_KEY_SIZE,
 873             .max_keysize        =   CTR_RFC3686_MAX_KEY_SIZE,
 874             .ivsize         =   CTR_RFC3686_IV_SIZE,
 875             .setkey         =   ctr_rfc3686_aes_set_key,
 876             .encrypt        =   ctr_rfc3686_aes_encrypt,
 877             .decrypt        =   ctr_rfc3686_aes_decrypt,
 878         }
 879     }
 880 };
 881
 882
 883 /*! \fn int __init ifxdeu_init_aes (void)
 884  *  \ingroup IFX_AES_FUNCTIONS
 885  *  \brief function to initialize AES driver
 886  *  \return ret
 887 */
 888 int __init ifxdeu_init_aes (void)
 889 {
 890     int ret = -ENOSYS;
 891
 892
 893
 894 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
 895     if (!disable_multiblock) {
 896         ifxdeu_aes_alg.cra_u.cipher.cia_max_nbytes = AES_BLOCK_SIZE;    //(size_t)-1;
 897         ifxdeu_aes_alg.cra_u.cipher.cia_req_align = 16;
 898         ifxdeu_aes_alg.cra_u.cipher.cia_ecb = ifx_deu_aes_ecb;
 899         ifxdeu_aes_alg.cra_u.cipher.cia_cbc = ifx_deu_aes_cbc;
 900         ifxdeu_aes_alg.cra_u.cipher.cia_cfb = ifx_deu_aes_cfb;
 901         ifxdeu_aes_alg.cra_u.cipher.cia_ofb = ifx_deu_aes_ofb;
 902     }
 903 #endif
 904
 905     if ((ret = crypto_register_alg(&ifxdeu_aes_alg)))
 906         goto aes_err;
 907
 908     if ((ret = crypto_register_alg(&ifxdeu_ecb_aes_alg)))
 909         goto ecb_aes_err;
 910
 911     if ((ret = crypto_register_alg(&ifxdeu_cbc_aes_alg)))
 912         goto cbc_aes_err;
 913
 914     if ((ret = crypto_register_alg(&ifxdeu_ctr_basic_aes_alg)))
 915         goto ctr_basic_aes_err;
 916
 917     if ((ret = crypto_register_alg(&ifxdeu_ctr_rfc3686_aes_alg)))
 918         goto ctr_rfc3686_aes_err;
 919
 920     aes_chip_init ();
 921
 922     CRTCL_SECT_INIT;
 923
 924
 925     printk (KERN_NOTICE "IFX DEU AES initialized%s%s.\n", disable_multiblock ? "" : " (multiblock)", disable_deudma ? "" : " (DMA)");
 926     return ret;
 927
 928 ctr_rfc3686_aes_err:
 929     crypto_unregister_alg(&ifxdeu_ctr_rfc3686_aes_alg);
 930     printk (KERN_ERR "IFX ctr_rfc3686_aes initialization failed!\n");
 931     return ret;
 932 ctr_basic_aes_err:
 933     crypto_unregister_alg(&ifxdeu_ctr_basic_aes_alg);
 934     printk (KERN_ERR "IFX ctr_basic_aes initialization failed!\n");
 935     return ret;
 936 cbc_aes_err:
 937     crypto_unregister_alg(&ifxdeu_cbc_aes_alg);
 938     printk (KERN_ERR "IFX cbc_aes initialization failed!\n");
 939     return ret;
 940 ecb_aes_err:
 941     crypto_unregister_alg(&ifxdeu_ecb_aes_alg);
 942     printk (KERN_ERR "IFX aes initialization failed!\n");
 943     return ret;
 944 aes_err:
 945     printk(KERN_ERR "IFX DEU AES initialization failed!\n");
 946
 947     return ret;
 948 }
 949
 950 /*! \fn void __exit ifxdeu_fini_aes (void)
 951  *  \ingroup IFX_AES_FUNCTIONS
 952  *  \brief unregister aes driver
 953 */
 954 void __exit ifxdeu_fini_aes (void)
 955 {
 956     crypto_unregister_alg (&ifxdeu_aes_alg);
 957     crypto_unregister_alg (&ifxdeu_ecb_aes_alg);
 958     crypto_unregister_alg (&ifxdeu_cbc_aes_alg);
 959     crypto_unregister_alg (&ifxdeu_ctr_basic_aes_alg);
 960     crypto_unregister_alg (&ifxdeu_ctr_rfc3686_aes_alg);
 961
 962 }
 963
 964