target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_mdio.c

   1 /*
   2  *  Atheros AR71xx built-in ethernet mac driver
   3  *
   4  *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
   5  *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
   6  *
   7  *  Based on Atheros' AG7100 driver
   8  *
   9  *  This program is free software; you can redistribute it and/or modify it
  10  *  under the terms of the GNU General Public License version 2 as published
  11  *  by the Free Software Foundation.
  12  */
  13
  14 #include "ag71xx.h"
  15
  16 #define AG71XX_MDIO_RETRY       1000
  17 #define AG71XX_MDIO_DELAY       5
  18
  19 static inline void ag71xx_mdio_wr(struct ag71xx_mdio *am, unsigned reg,
  20                                   u32 value)
  21 {
  22         void __iomem *r;
  23
  24         r = am->mdio_base + reg;
  25         __raw_writel(value, r);
  26
  27         /* flush write */
  28         (void) __raw_readl(r);
  29 }
  30
  31 static inline u32 ag71xx_mdio_rr(struct ag71xx_mdio *am, unsigned reg)
  32 {
  33         return __raw_readl(am->mdio_base + reg);
  34 }
  35
  36 static void ag71xx_mdio_dump_regs(struct ag71xx_mdio *am)
  37 {
  38         DBG("%s: mii_cfg=%08x, mii_cmd=%08x, mii_addr=%08x\n",
  39                 am->mii_bus->name,
  40                 ag71xx_mdio_rr(am, AG71XX_REG_MII_CFG),
  41                 ag71xx_mdio_rr(am, AG71XX_REG_MII_CMD),
  42                 ag71xx_mdio_rr(am, AG71XX_REG_MII_ADDR));
  43         DBG("%s: mii_ctrl=%08x, mii_status=%08x, mii_ind=%08x\n",
  44                 am->mii_bus->name,
  45                 ag71xx_mdio_rr(am, AG71XX_REG_MII_CTRL),
  46                 ag71xx_mdio_rr(am, AG71XX_REG_MII_STATUS),
  47                 ag71xx_mdio_rr(am, AG71XX_REG_MII_IND));
  48 }
  49
  50 static int ag71xx_mdio_wait_busy(struct ag71xx_mdio *am)
  51 {
  52         int i;
  53
  54         for (i = 0; i < AG71XX_MDIO_RETRY; i++) {
  55                 u32 busy;
  56
  57                 udelay(AG71XX_MDIO_DELAY);
  58
  59                 busy = ag71xx_mdio_rr(am, AG71XX_REG_MII_IND);
  60                 if (!busy)
  61                         return 0;
  62
  63                 udelay(AG71XX_MDIO_DELAY);
  64         }
  65
  66         pr_err("%s: MDIO operation timed out\n", am->mii_bus->name);
  67
  68         return -ETIMEDOUT;
  69 }
  70
  71 int ag71xx_mdio_mii_read(struct ag71xx_mdio *am, int addr, int reg)
  72 {
  73         int err;
  74         int ret;
  75
  76         err = ag71xx_mdio_wait_busy(am);
  77         if (err)
  78                 return 0xffff;
  79
  80         ag71xx_mdio_wr(am, AG71XX_REG_MII_CMD, MII_CMD_WRITE);
  81         ag71xx_mdio_wr(am, AG71XX_REG_MII_ADDR,
  82                         ((addr & 0xff) << MII_ADDR_SHIFT) | (reg & 0xff));
  83         ag71xx_mdio_wr(am, AG71XX_REG_MII_CMD, MII_CMD_READ);
  84
  85         err = ag71xx_mdio_wait_busy(am);
  86         if (err)
  87                 return 0xffff;
  88
  89         ret = ag71xx_mdio_rr(am, AG71XX_REG_MII_STATUS) & 0xffff;
  90         ag71xx_mdio_wr(am, AG71XX_REG_MII_CMD, MII_CMD_WRITE);
  91
  92         DBG("mii_read: addr=%04x, reg=%04x, value=%04x\n", addr, reg, ret);
  93
  94         return ret;
  95 }
  96
  97 void ag71xx_mdio_mii_write(struct ag71xx_mdio *am, int addr, int reg, u16 val)
  98 {
  99         DBG("mii_write: addr=%04x, reg=%04x, value=%04x\n", addr, reg, val);
 100
 101         ag71xx_mdio_wr(am, AG71XX_REG_MII_ADDR,
 102                         ((addr & 0xff) << MII_ADDR_SHIFT) | (reg & 0xff));
 103         ag71xx_mdio_wr(am, AG71XX_REG_MII_CTRL, val);
 104
 105         ag71xx_mdio_wait_busy(am);
 106 }
 107
 108 static const u32 ar71xx_mdio_div_table[] = {
 109         4, 4, 6, 8, 10, 14, 20, 28,
 110 };
 111
 112 static const u32 ar7240_mdio_div_table[] = {
 113         2, 2, 4, 6, 8, 12, 18, 26, 32, 40, 48, 56, 62, 70, 78, 96,
 114 };
 115
 116 static const u32 ar933x_mdio_div_table[] = {
 117         4, 4, 6, 8, 10, 14, 20, 28, 34, 42, 50, 58, 66, 74, 82, 98,
 118 };
 119
 120 static int ag71xx_mdio_get_divider(struct ag71xx_mdio *am, u32 *div)
 121 {
 122         unsigned long ref_clock, mdio_clock;
 123         const u32 *table;
 124         int ndivs;
 125         int i;
 126
 127         ref_clock = am->pdata->ref_clock;
 128         mdio_clock = am->pdata->mdio_clock;
 129
 130         if (!ref_clock || !mdio_clock)
 131                 return -EINVAL;
 132
 133         if (am->pdata->is_ar9330 || am->pdata->is_ar934x) {
 134                 table = ar933x_mdio_div_table;
 135                 ndivs = ARRAY_SIZE(ar933x_mdio_div_table);
 136         } else if (am->pdata->is_ar7240) {
 137                 table = ar7240_mdio_div_table;
 138                 ndivs = ARRAY_SIZE(ar7240_mdio_div_table);
 139         } else {
 140                 table = ar71xx_mdio_div_table;
 141                 ndivs = ARRAY_SIZE(ar71xx_mdio_div_table);
 142         }
 143
 144         for (i = 0; i < ndivs; i++) {
 145                 unsigned long t;
 146
 147                 t = ref_clock / table[i];
 148                 if (t <= mdio_clock) {
 149                         *div = i;
 150                         return 0;
 151                 }
 152         }
 153
 154         dev_err(&am->mii_bus->dev, "no divider found for %lu/%lu\n",
 155                 ref_clock, mdio_clock);
 156         return -ENOENT;
 157 }
 158
 159 static int ag71xx_mdio_reset(struct mii_bus *bus)
 160 {
 161         struct ag71xx_mdio *am = bus->priv;
 162         u32 t;
 163         int err;
 164
 165         err = ag71xx_mdio_get_divider(am, &t);
 166         if (err) {
 167                 /* fallback */
 168                 if (am->pdata->is_ar7240)
 169                         t = MII_CFG_CLK_DIV_6;
 170                 else if (am->pdata->builtin_switch && !am->pdata->is_ar934x)
 171                         t = MII_CFG_CLK_DIV_10;
 172                 else if (!am->pdata->builtin_switch && am->pdata->is_ar934x)
 173                         t = MII_CFG_CLK_DIV_58;
 174                 else
 175                         t = MII_CFG_CLK_DIV_28;
 176         }
 177
 178         ag71xx_mdio_wr(am, AG71XX_REG_MII_CFG, t | MII_CFG_RESET);
 179         udelay(100);
 180
 181         ag71xx_mdio_wr(am, AG71XX_REG_MII_CFG, t);
 182         udelay(100);
 183
 184         return 0;
 185 }
 186
 187 static int ag71xx_mdio_read(struct mii_bus *bus, int addr, int reg)
 188 {
 189         struct ag71xx_mdio *am = bus->priv;
 190
 191         if (am->pdata->builtin_switch)
 192                 return ar7240sw_phy_read(bus, addr, reg);
 193         else
 194                 return ag71xx_mdio_mii_read(am, addr, reg);
 195 }
 196
 197 static int ag71xx_mdio_write(struct mii_bus *bus, int addr, int reg, u16 val)
 198 {
 199         struct ag71xx_mdio *am = bus->priv;
 200
 201         if (am->pdata->builtin_switch)
 202                 ar7240sw_phy_write(bus, addr, reg, val);
 203         else
 204                 ag71xx_mdio_mii_write(am, addr, reg, val);
 205         return 0;
 206 }
 207
 208 static int __devinit ag71xx_mdio_probe(struct platform_device *pdev)
 209 {
 210         struct ag71xx_mdio_platform_data *pdata;
 211         struct ag71xx_mdio *am;
 212         struct resource *res;
 213         int i;
 214         int err;
 215
 216         pdata = pdev->dev.platform_data;
 217         if (!pdata) {
 218                 dev_err(&pdev->dev, "no platform data specified\n");
 219                 return -EINVAL;
 220         }
 221
 222         am = kzalloc(sizeof(*am), GFP_KERNEL);
 223         if (!am) {
 224                 err = -ENOMEM;
 225                 goto err_out;
 226         }
 227
 228         am->pdata = pdata;
 229
 230         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 231         if (!res) {
 232                 dev_err(&pdev->dev, "no iomem resource found\n");
 233                 err = -ENXIO;
 234                 goto err_out;
 235         }
 236
 237         am->mdio_base = ioremap_nocache(res->start, res->end - res->start + 1);
 238         if (!am->mdio_base) {
 239                 dev_err(&pdev->dev, "unable to ioremap registers\n");
 240                 err = -ENOMEM;
 241                 goto err_free_mdio;
 242         }
 243
 244         am->mii_bus = mdiobus_alloc();
 245         if (am->mii_bus == NULL) {
 246                 err = -ENOMEM;
 247                 goto err_iounmap;
 248         }
 249
 250         am->mii_bus->name = "ag71xx_mdio";
 251         am->mii_bus->read = ag71xx_mdio_read;
 252         am->mii_bus->write = ag71xx_mdio_write;
 253         am->mii_bus->reset = ag71xx_mdio_reset;
 254         am->mii_bus->irq = am->mii_irq;
 255         am->mii_bus->priv = am;
 256         am->mii_bus->parent = &pdev->dev;
 257         snprintf(am->mii_bus->id, MII_BUS_ID_SIZE, "%s", dev_name(&pdev->dev));
 258         am->mii_bus->phy_mask = pdata->phy_mask;
 259
 260         for (i = 0; i < PHY_MAX_ADDR; i++)
 261                 am->mii_irq[i] = PHY_POLL;
 262
 263         ag71xx_mdio_wr(am, AG71XX_REG_MAC_CFG1, 0);
 264
 265         err = mdiobus_register(am->mii_bus);
 266         if (err)
 267                 goto err_free_bus;
 268
 269         ag71xx_mdio_dump_regs(am);
 270
 271         platform_set_drvdata(pdev, am);
 272         return 0;
 273
 274 err_free_bus:
 275         mdiobus_free(am->mii_bus);
 276 err_iounmap:
 277         iounmap(am->mdio_base);
 278 err_free_mdio:
 279         kfree(am);
 280 err_out:
 281         return err;
 282 }
 283
 284 static int __devexit ag71xx_mdio_remove(struct platform_device *pdev)
 285 {
 286         struct ag71xx_mdio *am = platform_get_drvdata(pdev);
 287
 288         if (am) {
 289                 mdiobus_unregister(am->mii_bus);
 290                 mdiobus_free(am->mii_bus);
 291                 iounmap(am->mdio_base);
 292                 kfree(am);
 293                 platform_set_drvdata(pdev, NULL);
 294         }
 295
 296         return 0;
 297 }
 298
 299 static struct platform_driver ag71xx_mdio_driver = {
 300         .probe          = ag71xx_mdio_probe,
 301         .remove         = __exit_p(ag71xx_mdio_remove),
 302         .driver = {
 303                 .name   = "ag71xx-mdio",
 304         }
 305 };
 306
 307 int __init ag71xx_mdio_driver_init(void)
 308 {
 309         return platform_driver_register(&ag71xx_mdio_driver);
 310 }
 311
 312 void ag71xx_mdio_driver_exit(void)
 313 {
 314         platform_driver_unregister(&ag71xx_mdio_driver);
 315 }