kernel: bump 5.10 to 5.10.103
[openwrt/openwrt.git] / target / linux / at91 / patches-5.10 / 114-clk-at91-sama7g5-remove-all-kernel-doc-kernel-doc-wa.patch
1 From 9997227090cf529675aeb775585ec9f6c2f0f131 Mon Sep 17 00:00:00 2001
2 From: Randy Dunlap <rdunlap@infradead.org>
3 Date: Thu, 19 Aug 2021 15:32:37 -0700
4 Subject: [PATCH 114/247] clk: at91: sama7g5: remove all kernel-doc &
5 kernel-doc warnings
6
7 Remove all "/**" kernel-doc markers from sama7g5.c since they are
8 all internal to this driver source file only.
9 This eliminates 14 warnings that were reported by the kernel test robot.
10
11 Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
12 Reported-by: kernel test robot <lkp@intel.com>
13 Cc: Claudiu Beznea <claudiu.beznea@microchip.com>
14 Cc: Michael Turquette <mturquette@baylibre.com>
15 Cc: Stephen Boyd <sboyd@kernel.org>
16 Cc: Eugen Hristev <eugen.hristev@microchip.com>
17 Cc: linux-clk@vger.kernel.org
18 Cc: linux-arm-kernel@lists.infradead.org
19 Link: https://lore.kernel.org/r/20210819223237.20115-1-rdunlap@infradead.org
20 Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
21 Signed-off-by: Stephen Boyd <sboyd@kernel.org>
22 ---
23 drivers/clk/at91/sama7g5.c | 14 +++++++-------
24 1 file changed, 7 insertions(+), 7 deletions(-)
25
26 --- a/drivers/clk/at91/sama7g5.c
27 +++ b/drivers/clk/at91/sama7g5.c
28 @@ -35,7 +35,7 @@ static DEFINE_SPINLOCK(pmc_pll_lock);
29 static DEFINE_SPINLOCK(pmc_mck0_lock);
30 static DEFINE_SPINLOCK(pmc_mckX_lock);
31
32 -/**
33 +/*
34 * PLL clocks identifiers
35 * @PLL_ID_CPU: CPU PLL identifier
36 * @PLL_ID_SYS: System PLL identifier
37 @@ -56,7 +56,7 @@ enum pll_ids {
38 PLL_ID_MAX,
39 };
40
41 -/**
42 +/*
43 * PLL type identifiers
44 * @PLL_TYPE_FRAC: fractional PLL identifier
45 * @PLL_TYPE_DIV: divider PLL identifier
46 @@ -118,7 +118,7 @@ static const struct clk_pll_characterist
47 .output = pll_outputs,
48 };
49
50 -/**
51 +/*
52 * PLL clocks description
53 * @n: clock name
54 * @p: clock parent
55 @@ -285,7 +285,7 @@ static const struct {
56 },
57 };
58
59 -/**
60 +/*
61 * Master clock (MCK[1..4]) description
62 * @n: clock name
63 * @ep: extra parents names array
64 @@ -337,7 +337,7 @@ static const struct {
65 .c = 1, },
66 };
67
68 -/**
69 +/*
70 * System clock description
71 * @n: clock name
72 * @p: clock parent name
73 @@ -361,7 +361,7 @@ static const struct {
74 /* Mux table for programmable clocks. */
75 static u32 sama7g5_prog_mux_table[] = { 0, 1, 2, 5, 6, 7, 8, 9, 10, };
76
77 -/**
78 +/*
79 * Peripheral clock description
80 * @n: clock name
81 * @p: clock parent name
82 @@ -449,7 +449,7 @@ static const struct {
83 { .n = "uhphs_clk", .p = "mck1", .id = 106, },
84 };
85
86 -/**
87 +/*
88 * Generic clock description
89 * @n: clock name
90 * @pp: PLL parents