target/linux/at91/patches-5.10/213-ARM-at91-pm-add-sama7g5-ddr-phy-controller.patch

   1 From bbbbf16c44f34a2d563fa7d71de64ffe3b4b82dc Mon Sep 17 00:00:00 2001
   2 From: Claudiu Beznea <claudiu.beznea@microchip.com>
   3 Date: Thu, 15 Apr 2021 13:50:04 +0300
   4 Subject: [PATCH 213/247] ARM: at91: pm: add sama7g5 ddr phy controller
   5
   6 SAMA7G5 self-refresh procedure accesses also the DDR PHY registers.
   7 Adapt the code so that the at91_dt_ramc() to look also for DDR PHYs,
   8 in case it is mandatory.
   9
  10 Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
  11 Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
  12 Link: https://lore.kernel.org/r/20210415105010.569620-19-claudiu.beznea@microchip.com
  13 ---
  14  arch/arm/mach-at91/pm.c | 27 +++++++++++++++++++++------
  15  1 file changed, 21 insertions(+), 6 deletions(-)
  16
  17 --- a/arch/arm/mach-at91/pm.c
  18 +++ b/arch/arm/mach-at91/pm.c
  19 @@ -552,7 +552,12 @@ static const struct of_device_id ramc_id
  20         { /*sentinel*/ }
  21  };
  22
  23 -static __init int at91_dt_ramc(void)
  24 +static const struct of_device_id ramc_phy_ids[] __initconst = {
  25 +       { .compatible = "microchip,sama7g5-ddr3phy", },
  26 +       { /* Sentinel. */ },
  27 +};
  28 +
  29 +static __init void at91_dt_ramc(bool phy_mandatory)
  30  {
  31         struct device_node *np;
  32         const struct of_device_id *of_id;
  33 @@ -585,6 +590,16 @@ static __init int at91_dt_ramc(void)
  34                 goto unmap_ramc;
  35         }
  36
  37 +       /* Lookup for DDR PHY node, if any. */
  38 +       for_each_matching_node_and_match(np, ramc_phy_ids, &of_id) {
  39 +               soc_pm.data.ramc_phy = of_iomap(np, 0);
  40 +               if (!soc_pm.data.ramc_phy)
  41 +                       panic(pr_fmt("unable to map ramc phy cpu registers\n"));
  42 +       }
  43 +
  44 +       if (phy_mandatory && !soc_pm.data.ramc_phy)
  45 +               panic(pr_fmt("DDR PHY is mandatory!\n"));
  46 +
  47         if (!standby) {
  48                 pr_warn("ramc no standby function available\n");
  49                 return 0;
  50 @@ -953,7 +968,7 @@ void __init at91rm9200_pm_init(void)
  51         soc_pm.data.standby_mode = AT91_PM_STANDBY;
  52         soc_pm.data.suspend_mode = AT91_PM_ULP0;
  53
  54 -       ret = at91_dt_ramc();
  55 +       ret = at91_dt_ramc(false);
  56         if (ret)
  57                 return;
  58
  59 @@ -980,7 +995,7 @@ void __init sam9x60_pm_init(void)
  60
  61         at91_pm_modes_validate(modes, ARRAY_SIZE(modes));
  62         at91_pm_modes_init(iomaps, ARRAY_SIZE(iomaps));
  63 -       ret = at91_dt_ramc();
  64 +       ret = at91_dt_ramc(false);
  65         if (ret)
  66                 return;
  67
  68 @@ -1005,7 +1020,7 @@ void __init at91sam9_pm_init(void)
  69         soc_pm.data.standby_mode = AT91_PM_STANDBY;
  70         soc_pm.data.suspend_mode = AT91_PM_ULP0;
  71
  72 -       ret = at91_dt_ramc();
  73 +       ret = at91_dt_ramc(false);
  74         if (ret)
  75                 return;
  76
  77 @@ -1023,7 +1038,7 @@ void __init sama5_pm_init(void)
  78                 return;
  79
  80         at91_pm_modes_validate(modes, ARRAY_SIZE(modes));
  81 -       ret = at91_dt_ramc();
  82 +       ret = at91_dt_ramc(false);
  83         if (ret)
  84                 return;
  85
  86 @@ -1048,7 +1063,7 @@ void __init sama5d2_pm_init(void)
  87
  88         at91_pm_modes_validate(modes, ARRAY_SIZE(modes));
  89         at91_pm_modes_init(iomaps, ARRAY_SIZE(iomaps));
  90 -       ret = at91_dt_ramc();
  91 +       ret = at91_dt_ramc(false);
  92         if (ret)
  93                 return;
  94