target/linux/at91/patches-5.15/168-media-atmel-atmel-isc-add-RLP-to-register-offsets.patch

   1 From b432a8b0fc88de5b49236482053d8d372c68ee55 Mon Sep 17 00:00:00 2001
   2 From: Eugen Hristev <eugen.hristev@microchip.com>
   3 Date: Tue, 13 Apr 2021 12:57:10 +0200
   4 Subject: [PATCH 168/247] media: atmel: atmel-isc: add RLP to register offsets
   5
   6 The RLP submodule is a part of the atmel-isc pipeline, and stands for
   7 Rounding,Limiting and Packaging. It used to extract specific data from the
   8 ISC pipeline. For example if we want to output greyscale 8 bit, we would
   9 use limiting to 8 bits, and packaging to Luma component only.
  10 Add rlp to the reg offsets struct.
  11 This will allow different products to have a different reg offset for this
  12 particular module.
  13
  14 Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
  15 Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
  16 Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
  17 ---
  18  drivers/media/platform/atmel/atmel-isc-base.c    | 4 ++--
  19  drivers/media/platform/atmel/atmel-isc-regs.h    | 2 ++
  20  drivers/media/platform/atmel/atmel-isc.h         | 2 ++
  21  drivers/media/platform/atmel/atmel-sama5d2-isc.c | 1 +
  22  4 files changed, 7 insertions(+), 2 deletions(-)
  23
  24 --- a/drivers/media/platform/atmel/atmel-isc-base.c
  25 +++ b/drivers/media/platform/atmel/atmel-isc-base.c
  26 @@ -726,8 +726,8 @@ static int isc_configure(struct isc_devi
  27
  28         regmap_update_bits(regmap, ISC_PFE_CFG0, mask, pfe_cfg0);
  29
  30 -       regmap_update_bits(regmap, ISC_RLP_CFG, ISC_RLP_CFG_MODE_MASK,
  31 -                          rlp_mode);
  32 +       regmap_update_bits(regmap, ISC_RLP_CFG + isc->offsets.rlp,
  33 +                          ISC_RLP_CFG_MODE_MASK, rlp_mode);
  34
  35         regmap_write(regmap, ISC_DCFG, dcfg);
  36
  37 --- a/drivers/media/platform/atmel/atmel-isc-regs.h
  38 +++ b/drivers/media/platform/atmel/atmel-isc-regs.h
  39 @@ -204,6 +204,8 @@
  40  /* Subsampling 4:2:2 to 4:2:0 Control Register */
  41  #define ISC_SUB420_CTRL 0x000003cc
  42
  43 +/* Offset for RLP register specific to sama5d2 product */
  44 +#define ISC_SAMA5D2_RLP_OFFSET 0
  45  /* Rounding, Limiting and Packing Configuration Register */
  46  #define ISC_RLP_CFG     0x000003d0
  47
  48 --- a/drivers/media/platform/atmel/atmel-isc.h
  49 +++ b/drivers/media/platform/atmel/atmel-isc.h
  50 @@ -149,12 +149,14 @@ struct isc_ctrls {
  51   * @cbc:               Offset for the CBC register
  52   * @sub422:            Offset for the SUB422 register
  53   * @sub420:            Offset for the SUB420 register
  54 + * @rlp:               Offset for the RLP register
  55   */
  56  struct isc_reg_offsets {
  57         u32 csc;
  58         u32 cbc;
  59         u32 sub422;
  60         u32 sub420;
  61 +       u32 rlp;
  62  };
  63
  64  /*
  65 --- a/drivers/media/platform/atmel/atmel-sama5d2-isc.c
  66 +++ b/drivers/media/platform/atmel/atmel-sama5d2-isc.c
  67 @@ -255,6 +255,7 @@ static int atmel_isc_probe(struct platfo
  68         isc->offsets.cbc = ISC_SAMA5D2_CBC_OFFSET;
  69         isc->offsets.sub422 = ISC_SAMA5D2_SUB422_OFFSET;
  70         isc->offsets.sub420 = ISC_SAMA5D2_SUB420_OFFSET;
  71 +       isc->offsets.rlp = ISC_SAMA5D2_RLP_OFFSET;
  72
  73         /* sama5d2-isc - 8 bits per beat */
  74         isc->dcfg = ISC_DCFG_YMBSIZE_BEATS8 | ISC_DCFG_CMBSIZE_BEATS8;