11c0f2c1e3193b9e2275e0a14ed2cf9a84db2180
[openwrt/openwrt.git] / target / linux / at91 / patches-5.15 / 224-ARM-dts-at91-sama7g5-add-ram-controllers.patch
1 From cf96a88e44f1fde9f1a30ab335329ff9e895e6f8 Mon Sep 17 00:00:00 2001
2 From: Claudiu Beznea <claudiu.beznea@microchip.com>
3 Date: Mon, 23 Aug 2021 16:19:13 +0300
4 Subject: [PATCH 224/247] ARM: dts: at91: sama7g5: add ram controllers
5
6 Add RAM and RAMC PHY controllers. These are necessary for platform
7 specific power management code.
8
9 Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
10 Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
11 Link: https://lore.kernel.org/r/20210823131915.23857-3-claudiu.beznea@microchip.com
12 ---
13 arch/arm/boot/dts/sama7g5.dtsi | 12 ++++++++++++
14 1 file changed, 12 insertions(+)
15
16 --- a/arch/arm/boot/dts/sama7g5.dtsi
17 +++ b/arch/arm/boot/dts/sama7g5.dtsi
18 @@ -515,6 +515,18 @@
19 };
20 };
21
22 + uddrc: uddrc@e3800000 {
23 + compatible = "microchip,sama7g5-uddrc";
24 + reg = <0xe3800000 0x4000>;
25 + status = "okay";
26 + };
27 +
28 + ddr3phy: ddr3phy@e3804000 {
29 + compatible = "microchip,sama7g5-ddr3phy";
30 + reg = <0xe3804000 0x1000>;
31 + status = "okay";
32 + };
33 +
34 gic: interrupt-controller@e8c11000 {
35 compatible = "arm,cortex-a7-gic";
36 #interrupt-cells = <3>;