ath79: add Embedded Wireless Balin Platform
[openwrt/openwrt.git] / target / linux / ath79 / dts / ar9342_ubnt_aircube-ac.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "ar9344.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 compatible = "ubnt,aircube-ac", "qca,ar9342";
10 model = "Ubiquiti airCube AC";
11
12 keys {
13 compatible = "gpio-keys";
14
15 reset {
16 label = "reset";
17 linux,code = <KEY_RESTART>;
18 gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
19 debounce-interval = <60>;
20 };
21 };
22 };
23
24 &spi {
25 status = "okay";
26
27 flash@0 {
28 compatible = "jedec,spi-nor";
29 reg = <0>;
30 spi-max-frequency = <25000000>;
31
32 partitions {
33 compatible = "fixed-partitions";
34 #address-cells = <1>;
35 #size-cells = <1>;
36
37 partition@0 {
38 label = "u-boot";
39 reg = <0x000000 0x040000>;
40 read-only;
41 };
42
43 partition@40000 {
44 label = "u-boot-env";
45 reg = <0x040000 0x010000>;
46 read-only;
47 };
48
49 partition@50000 {
50 compatible = "denx,uimage";
51 label = "firmware";
52 reg = <0x050000 0xf60000>;
53 };
54
55 partition@fb0000 {
56 label = "cfg";
57 reg = <0xfb0000 0x040000>;
58 read-only;
59 };
60
61 art: partition@ff0000 {
62 label = "art";
63 reg = <0xff0000 0x010000>;
64 read-only;
65 };
66 };
67 };
68 };
69
70 &ref {
71 clock-frequency = <40000000>;
72 };
73
74 &pcie {
75 status = "okay";
76 };
77
78 &mdio0 {
79 status = "okay";
80
81 phy-mask = <4>;
82 phy0: ethernet-phy@0 {
83 phy-mode = "rgmii";
84 reg = <0>;
85
86 qca,ar8327-initvals = <
87 0x04 0x07600000 /* PORT0 PAD MODE CTRL */
88 0x7c 0x0000007e /* PORT0_STATUS */
89 >;
90 };
91 };
92
93 &eth0 {
94 status = "okay";
95
96 /* default for ar934x, except for 1000M and 10M */
97 pll-data = <0x06000000 0x00000101 0x00001313>;
98
99 nvmem-cells = <&macaddr_art_0>;
100 nvmem-cell-names = "mac-address";
101
102 phy-mode = "rgmii";
103 phy-handle = <&phy0>;
104
105 gmac-config {
106 device = <&gmac>;
107 };
108 };
109
110 &wmac {
111 status = "okay";
112
113 mtd-cal-data = <&art 0x1000>;
114 };
115
116 &art {
117 compatible = "nvmem-cells";
118 #address-cells = <1>;
119 #size-cells = <1>;
120
121 macaddr_art_0: macaddr@0 {
122 reg = <0x0 0x6>;
123 };
124 };