d2f385c57153cbb4d856e39cf84df131969575ff
[openwrt/openwrt.git] / target / linux / ath79 / dts / ar9344_devolo_magic-2-wifi.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "ar9344.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 model = "Devolo Magic 2 Wifi";
10 compatible = "devolo,magic-2-wifi", "qca,ar9344";
11
12 aliases {
13 led-boot = &led_dlan_red;
14 led-failsafe = &led_dlan_red;
15 led-running = &led_dlan_white;
16 led-upgrade = &led_dlan_red;
17 };
18
19 leds {
20 compatible = "gpio-leds";
21
22 wlan {
23 label = "white:wlan";
24 gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
25 linux,default-trigger = "phy1tpt";
26 };
27
28 led_dlan_white: dlan_white {
29 label = "white:dlan";
30 gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
31 };
32
33 led_dlan_red: dlan_red {
34 label = "red:dlan";
35 gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
36 panic-indicator;
37 };
38 };
39
40 keys {
41 compatible = "gpio-keys";
42
43 reset {
44 label = "Reset button";
45 linux,code = <KEY_RESTART>;
46 gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
47 debounce-interval = <60>;
48 };
49
50 wifi {
51 label = "WIFI button";
52 linux,code = <KEY_RFKILL>;
53 gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
54 debounce-interval = <60>;
55 };
56
57 dlan {
58 label = "DLAN button";
59 linux,code = <BTN_0>;
60 gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
61 debounce-interval = <60>;
62 };
63 };
64 };
65
66 &gpio {
67 wlan_power {
68 gpio-hog;
69 line-name = "WLAN power";
70 gpios = <&gpio 21 GPIO_ACTIVE_HIGH>;
71 output-high;
72 };
73 };
74
75 &spi {
76 status = "okay";
77
78 flash@0 {
79 compatible = "jedec,spi-nor";
80 reg = <0>;
81 spi-max-frequency = <25000000>;
82
83 partitions {
84 compatible = "fixed-partitions";
85 #address-cells = <1>;
86 #size-cells = <1>;
87
88 uboot: partition@0 {
89 label = "u-boot";
90 reg = <0x0 0x40000>;
91 read-only;
92 };
93
94 partition@40000 {
95 label = "u-boot-env";
96 reg = <0x40000 0x10000>;
97 read-only;
98 };
99
100 partition@50000 {
101 label = "Config1";
102 reg = <0x50000 0x10000>;
103 read-only;
104 };
105
106 partition@60000 {
107 label = "Config2";
108 reg = <0x60000 0x10000>;
109 read-only;
110 };
111
112 partition@70000 {
113 compatible = "denx,uimage";
114 label = "firmware";
115 reg = <0x70000 0xf80000>;
116 };
117
118 art: partition@ff0000 {
119 label = "art";
120 reg = <0xff0000 0x10000>;
121 read-only;
122 };
123 };
124 };
125 };
126
127 &ref {
128 clock-frequency = <40000000>;
129 };
130
131 &uart {
132 status = "okay";
133 };
134
135 &eth0 {
136 status = "okay";
137
138 pll-data = <0x02000000 0x00000101 0x00001616>;
139
140 mtd-mac-address = <&art 0x1002>;
141 mtd-mac-address-increment = <2>;
142
143 phy-mode = "rgmii";
144 phy-handle = <&phy0>;
145 };
146
147 &wmac {
148 status = "okay";
149
150 mtd-cal-data = <&art 0x1000>;
151 };
152
153 &pcie {
154 status = "okay";
155
156 wifi@0,0 {
157 compatible = "qcom,ath10k";
158 reg = <0 0 0 0 0>;
159 };
160 };
161
162 &mdio0 {
163 status = "okay";
164
165 phy0: ethernet-phy@0 {
166 reg = <0>;
167 phy-mode = "rgmii";
168
169 qca,ar8327-initvals = <
170 /* PORT0: RGMII, MAC0/6 exchage, tx_delay 01, No rx_delay */
171 0x04 0x06400000
172 0x08 0x00000000 /* PORT5 PAD MODE CTRL */
173 0x0c 0x00000000 /* PORT6 PAD MODE CTRL */
174 0x7c 0x0000007e /* PORT0_STATUS */
175 >;
176 };
177 };