target/linux/ath79/dts/ar9344_zbtlink_zbt-wd323.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "ar9344.dtsi"
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7
   8 / {
   9         model = "ZBT WD323";
  10         compatible = "zbtlink,zbt-wd323", "qca,ar9344";
  11
  12         keys {
  13                 compatible = "gpio-keys";
  14
  15                 reset {
  16                         label = "reset";
  17                         gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
  18                         linux,code = <KEY_RESTART>;
  19                 };
  20         };
  21
  22         i2c {
  23                 compatible = "i2c-gpio";
  24                 #address-cells = <1>;
  25                 #size-cells = <0>;
  26
  27                 pinctrl-names = "default";
  28                 pinctrl-0 = <&enable_gpio15 &enable_gpio19>;
  29
  30                 sda-gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
  31                 scl-gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
  32
  33                 pcf8563: pcf8563@51 {
  34                         compatible = "nxp,pcf8563";
  35                         reg = <0x51>;
  36                         #clock-cells = <0>;
  37                 };
  38         };
  39
  40         leds {
  41                 compatible = "gpio-leds";
  42
  43                 pinctrl-names = "default";
  44                 pinctrl-0 = <&enable_gpio20_gpio22>;
  45
  46                 wifi {
  47                         label = "green:wifi";
  48                         gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
  49                         linux,default-trigger = "phy0tpt";
  50                 };
  51
  52                 lan1 {
  53                         label = "orange:lan1";
  54                         gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
  55                 };
  56
  57                 lan2 {
  58                         label = "orange:lan2";
  59                         gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
  60                 };
  61         };
  62 };
  63
  64 &wdt {
  65         status = "okay";
  66
  67         pinctrl-names = "default";
  68         pinctrl-0 = <&enable_gpio21>;
  69 };
  70
  71 &uart {
  72         status = "okay";
  73 };
  74
  75 &gpio {
  76         pinctrl-names = "default";
  77         pinctrl-0 = <&jtag_disable_pins>;
  78 };
  79
  80 &usb {
  81         status = "okay";
  82 };
  83
  84 &usb_phy {
  85         status = "okay";
  86 };
  87
  88 &eth0 {
  89         status = "okay";
  90         phy-handle = <&swphy4>;
  91         mtd-mac-address = <&art 0x0>;
  92 };
  93
  94 &eth1 {
  95         status = "okay";
  96         mtd-mac-address = <&art 0x6>;
  97 };
  98
  99 &spi {
 100         status = "okay";
 101
 102         flash@0 {
 103                 compatible = "jedec,spi-nor";
 104                 spi-max-frequency = <22000000>;
 105                 reg = <0>;
 106
 107                 partitions {
 108                         compatible = "fixed-partitions";
 109                         #address-cells = <1>;
 110                         #size-cells = <1>;
 111
 112                         uboot@0 {
 113                                 reg = <0x0 0x40000>;
 114                                 read-only;
 115                         };
 116
 117                         uboot-env@40000 {
 118                                 reg = <0x40000 0x10000>;
 119                                 read-only;
 120                         };
 121
 122                         firmware@50000 {
 123                                 compatible = "denx,uimage";
 124                                 reg = <0x50000 0xfa0000>;
 125                         };
 126
 127                         art: art@ff0000 {
 128                                 reg = <0xff0000 0x10000>;
 129                                 read-only;
 130                         };
 131                 };
 132         };
 133 };
 134
 135 &wmac {
 136         status = "okay";
 137         mtd-cal-data = <&art 0x1000>;
 138 };
 139
 140 &pinmux {
 141         enable_gpio15: pinmux_enable_gpio15 {
 142                 pinctrl-single,bits = <0xc 0x0 0xff000000>;
 143         };
 144
 145         enable_gpio19: pinmux_enable_gpio19 {
 146                 pinctrl-single,bits = <0x10 0x0 0xff000000>;
 147         };
 148
 149         enable_gpio20_gpio22: pinmux_enable_gpio20_gpio22 {
 150                 pinctrl-single,bits = <0x14 0x0 0xff00ff>;
 151         };
 152
 153         enable_gpio21: pinmux_enable_gpio21 {
 154                 pinctrl-single,bits = <0x14 0x0 0xff00>;
 155         };
 156 };