ath79: move usb led trigger node to SoC dtsi
[openwrt/openwrt.git] / target / linux / ath79 / dts / qca9558_tplink_tl-wr1043nd.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "qca955x.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 aliases {
10 led-boot = &led_system;
11 led-failsafe = &led_system;
12 led-running = &led_system;
13 led-upgrade = &led_system;
14 label-mac-device = &wmac;
15 };
16
17 leds {
18 compatible = "gpio-leds";
19
20 led_system: system {
21 label = "green:system";
22 gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
23 linux,default-trigger = "heartbeat";
24 };
25
26 usb {
27 label = "green:usb";
28 gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
29 trigger-sources = <&hub_port0>;
30 linux,default-trigger = "usbport";
31 };
32
33 wifi_green {
34 label = "green:wlan";
35 gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
36 linux,default-trigger = "phy0tpt";
37 };
38
39 wifi_wps {
40 label = "green:wps";
41 gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
42 };
43 };
44
45 keys {
46 compatible = "gpio-keys";
47
48 reset {
49 label = "Reset button";
50 linux,code = <KEY_RESTART>;
51 gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
52 debounce-interval = <60>;
53 };
54
55 wifi {
56 label = "RFKILL button";
57 linux,code = <KEY_RFKILL>;
58 gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
59 debounce-interval = <60>;
60 };
61 };
62
63 gpio-export {
64 compatible = "gpio-export";
65 #size-cells = <0>;
66
67 gpio_usb_power {
68 gpio-export,name = "tp-link:power:usb";
69 gpio-export,output = <1>;
70 gpios = <&gpio 21 GPIO_ACTIVE_HIGH>;
71 };
72 };
73 };
74
75 &usb_phy0 {
76 status = "okay";
77 };
78
79 &usb0 {
80 status = "okay";
81 };
82
83 &spi {
84 status = "okay";
85
86 flash@0 {
87 compatible = "jedec,spi-nor";
88 reg = <0>;
89 spi-max-frequency = <33400000>;
90
91 partitions {
92 compatible = "fixed-partitions";
93 #address-cells = <1>;
94 #size-cells = <1>;
95
96 uboot: partition@0 {
97 label = "u-boot";
98 reg = <0x000000 0x020000>;
99 read-only;
100 };
101
102 partition@20000 {
103 compatible = "tplink,firmware";
104 label = "firmware";
105 reg = <0x020000 0x7d0000>;
106 };
107
108 art: partition@7f0000 {
109 label = "art";
110 reg = <0x7f0000 0x010000>;
111 read-only;
112 };
113 };
114 };
115 };
116
117 &mdio0 {
118 status = "okay";
119
120 phy0: ethernet-phy@0 {
121 reg = <0>;
122 qca,ar8327-initvals = <
123 0x04 0x00080080 /* PORT0 PAD MODE CTRL */
124 0x0c 0x07600000 /* PORT6 PAD MODE CTRL */
125 0x10 0x81000080 /* POWER_ON_STRAP */
126 0x50 0xcc35cc35 /* LED_CTRL0 */
127 0x54 0xca35ca35 /* LED_CTRL1 */
128 0x58 0xc935c935 /* LED_CTRL2 */
129 0x5c 0x03ffff00 /* LED_CTRL3 */
130 0x7c 0x0000007e /* PORT0_STATUS */
131 0x94 0x0000007e /* PORT6 STATUS */
132 >;
133 };
134 };
135
136 &eth0 {
137 status = "okay";
138
139 pll-data = <0x56000000 0x00000101 0x00001616>;
140
141 nvmem-cells = <&macaddr_uboot_1fc00>;
142 nvmem-cell-names = "mac-address";
143 mac-address-increment = <1>;
144 phy-handle = <&phy0>;
145 };
146
147 &eth1 {
148 status = "okay";
149
150 pll-data = <0x03000101 0x00000101 0x00001616>;
151
152 nvmem-cells = <&macaddr_uboot_1fc00>;
153 nvmem-cell-names = "mac-address";
154
155 fixed-link {
156 speed = <1000>;
157 full-duplex;
158 };
159 };
160
161 &wmac {
162 status = "okay";
163 mtd-cal-data = <&art 0x1000>;
164 nvmem-cells = <&macaddr_uboot_1fc00>;
165 nvmem-cell-names = "mac-address";
166 };
167
168 &uboot {
169 compatible = "nvmem-cells";
170 #address-cells = <1>;
171 #size-cells = <1>;
172
173 macaddr_uboot_1fc00: macaddr@1fc00 {
174 reg = <0x1fc00 0x6>;
175 };
176 };