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[openwrt/openwrt.git] / target / linux / ath79 / patches-4.19 / 0028-MIPS-ath79-drop-machfiles.patch
1 From badf28957b6dc400dff27bd23ba2ae75d9514be5 Mon Sep 17 00:00:00 2001
2 From: John Crispin <john@phrozen.org>
3 Date: Sat, 23 Jun 2018 15:04:09 +0200
4 Subject: [PATCH 28/33] MIPS: ath79: drop machfiles
5
6 With the target now being fully OF based, we can drop the legacy mach
7 files. Boards can now boot fully of devicetree files.
8
9 Signed-off-by: John Crispin <john@phrozen.org>
10 ---
11 arch/mips/Kconfig | 1 -
12 arch/mips/ath79/Kconfig | 73 -------------------
13 arch/mips/ath79/Makefile | 10 ---
14 arch/mips/ath79/clock.c | 1 -
15 arch/mips/ath79/mach-ap121.c | 92 ------------------------
16 arch/mips/ath79/mach-ap136.c | 156 -----------------------------------------
17 arch/mips/ath79/mach-ap81.c | 100 --------------------------
18 arch/mips/ath79/mach-db120.c | 136 -----------------------------------
19 arch/mips/ath79/mach-pb44.c | 128 ---------------------------------
20 arch/mips/ath79/mach-ubnt-xm.c | 126 ---------------------------------
21 arch/mips/ath79/machtypes.h | 28 --------
22 arch/mips/ath79/setup.c | 77 +++-----------------
23 12 files changed, 9 insertions(+), 919 deletions(-)
24 delete mode 100644 arch/mips/ath79/mach-ap121.c
25 delete mode 100644 arch/mips/ath79/mach-ap136.c
26 delete mode 100644 arch/mips/ath79/mach-ap81.c
27 delete mode 100644 arch/mips/ath79/mach-db120.c
28 delete mode 100644 arch/mips/ath79/mach-pb44.c
29 delete mode 100644 arch/mips/ath79/mach-ubnt-xm.c
30 delete mode 100644 arch/mips/ath79/machtypes.h
31
32 --- a/arch/mips/Kconfig
33 +++ b/arch/mips/Kconfig
34 @@ -202,7 +202,6 @@ config ATH79
35 select COMMON_CLK
36 select CLKDEV_LOOKUP
37 select IRQ_MIPS_CPU
38 - select MIPS_MACHINE
39 select SYS_HAS_CPU_MIPS32_R2
40 select SYS_HAS_EARLY_PRINTK
41 select SYS_SUPPORTS_32BIT_KERNEL
42 --- a/arch/mips/ath79/Kconfig
43 +++ b/arch/mips/ath79/Kconfig
44 @@ -1,79 +1,6 @@
45 # SPDX-License-Identifier: GPL-2.0
46 if ATH79
47
48 -menu "Atheros AR71XX/AR724X/AR913X machine selection"
49 -
50 -config ATH79_MACH_AP121
51 - bool "Atheros AP121 reference board"
52 - select SOC_AR933X
53 - select ATH79_DEV_GPIO_BUTTONS
54 - select ATH79_DEV_LEDS_GPIO
55 - select ATH79_DEV_SPI
56 - select ATH79_DEV_USB
57 - select ATH79_DEV_WMAC
58 - help
59 - Say 'Y' here if you want your kernel to support the
60 - Atheros AP121 reference board.
61 -
62 -config ATH79_MACH_AP136
63 - bool "Atheros AP136 reference board"
64 - select SOC_QCA955X
65 - select ATH79_DEV_GPIO_BUTTONS
66 - select ATH79_DEV_LEDS_GPIO
67 - select ATH79_DEV_SPI
68 - select ATH79_DEV_USB
69 - select ATH79_DEV_WMAC
70 - help
71 - Say 'Y' here if you want your kernel to support the
72 - Atheros AP136 reference board.
73 -
74 -config ATH79_MACH_AP81
75 - bool "Atheros AP81 reference board"
76 - select SOC_AR913X
77 - select ATH79_DEV_GPIO_BUTTONS
78 - select ATH79_DEV_LEDS_GPIO
79 - select ATH79_DEV_SPI
80 - select ATH79_DEV_USB
81 - select ATH79_DEV_WMAC
82 - help
83 - Say 'Y' here if you want your kernel to support the
84 - Atheros AP81 reference board.
85 -
86 -config ATH79_MACH_DB120
87 - bool "Atheros DB120 reference board"
88 - select SOC_AR934X
89 - select ATH79_DEV_GPIO_BUTTONS
90 - select ATH79_DEV_LEDS_GPIO
91 - select ATH79_DEV_SPI
92 - select ATH79_DEV_USB
93 - select ATH79_DEV_WMAC
94 - help
95 - Say 'Y' here if you want your kernel to support the
96 - Atheros DB120 reference board.
97 -
98 -config ATH79_MACH_PB44
99 - bool "Atheros PB44 reference board"
100 - select SOC_AR71XX
101 - select ATH79_DEV_GPIO_BUTTONS
102 - select ATH79_DEV_LEDS_GPIO
103 - select ATH79_DEV_SPI
104 - select ATH79_DEV_USB
105 - help
106 - Say 'Y' here if you want your kernel to support the
107 - Atheros PB44 reference board.
108 -
109 -config ATH79_MACH_UBNT_XM
110 - bool "Ubiquiti Networks XM (rev 1.0) board"
111 - select SOC_AR724X
112 - select ATH79_DEV_GPIO_BUTTONS
113 - select ATH79_DEV_LEDS_GPIO
114 - select ATH79_DEV_SPI
115 - help
116 - Say 'Y' here if you want your kernel to support the
117 - Ubiquiti Networks XM (rev 1.0) board.
118 -
119 -endmenu
120 -
121 config SOC_AR71XX
122 select HW_HAS_PCI
123 def_bool n
124 --- a/arch/mips/ath79/Makefile
125 +++ b/arch/mips/ath79/Makefile
126 @@ -22,13 +22,3 @@ obj-$(CONFIG_ATH79_DEV_LEDS_GPIO) += dev
127 obj-$(CONFIG_ATH79_DEV_SPI) += dev-spi.o
128 obj-$(CONFIG_ATH79_DEV_USB) += dev-usb.o
129 obj-$(CONFIG_ATH79_DEV_WMAC) += dev-wmac.o
130 -
131 -#
132 -# Machines
133 -#
134 -obj-$(CONFIG_ATH79_MACH_AP121) += mach-ap121.o
135 -obj-$(CONFIG_ATH79_MACH_AP136) += mach-ap136.o
136 -obj-$(CONFIG_ATH79_MACH_AP81) += mach-ap81.o
137 -obj-$(CONFIG_ATH79_MACH_DB120) += mach-db120.o
138 -obj-$(CONFIG_ATH79_MACH_PB44) += mach-pb44.o
139 -obj-$(CONFIG_ATH79_MACH_UBNT_XM) += mach-ubnt-xm.o
140 --- a/arch/mips/ath79/clock.c
141 +++ b/arch/mips/ath79/clock.c
142 @@ -26,7 +26,6 @@
143 #include <asm/mach-ath79/ath79.h>
144 #include <asm/mach-ath79/ar71xx_regs.h>
145 #include "common.h"
146 -#include "machtypes.h"
147
148 #define AR71XX_BASE_FREQ 40000000
149 #define AR724X_BASE_FREQ 40000000
150 --- a/arch/mips/ath79/mach-ap121.c
151 +++ /dev/null
152 @@ -1,92 +0,0 @@
153 -/*
154 - * Atheros AP121 board support
155 - *
156 - * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
157 - *
158 - * This program is free software; you can redistribute it and/or modify it
159 - * under the terms of the GNU General Public License version 2 as published
160 - * by the Free Software Foundation.
161 - */
162 -
163 -#include "machtypes.h"
164 -#include "dev-gpio-buttons.h"
165 -#include "dev-leds-gpio.h"
166 -#include "dev-spi.h"
167 -#include "dev-usb.h"
168 -#include "dev-wmac.h"
169 -
170 -#define AP121_GPIO_LED_WLAN 0
171 -#define AP121_GPIO_LED_USB 1
172 -
173 -#define AP121_GPIO_BTN_JUMPSTART 11
174 -#define AP121_GPIO_BTN_RESET 12
175 -
176 -#define AP121_KEYS_POLL_INTERVAL 20 /* msecs */
177 -#define AP121_KEYS_DEBOUNCE_INTERVAL (3 * AP121_KEYS_POLL_INTERVAL)
178 -
179 -#define AP121_CAL_DATA_ADDR 0x1fff1000
180 -
181 -static struct gpio_led ap121_leds_gpio[] __initdata = {
182 - {
183 - .name = "ap121:green:usb",
184 - .gpio = AP121_GPIO_LED_USB,
185 - .active_low = 0,
186 - },
187 - {
188 - .name = "ap121:green:wlan",
189 - .gpio = AP121_GPIO_LED_WLAN,
190 - .active_low = 0,
191 - },
192 -};
193 -
194 -static struct gpio_keys_button ap121_gpio_keys[] __initdata = {
195 - {
196 - .desc = "jumpstart button",
197 - .type = EV_KEY,
198 - .code = KEY_WPS_BUTTON,
199 - .debounce_interval = AP121_KEYS_DEBOUNCE_INTERVAL,
200 - .gpio = AP121_GPIO_BTN_JUMPSTART,
201 - .active_low = 1,
202 - },
203 - {
204 - .desc = "reset button",
205 - .type = EV_KEY,
206 - .code = KEY_RESTART,
207 - .debounce_interval = AP121_KEYS_DEBOUNCE_INTERVAL,
208 - .gpio = AP121_GPIO_BTN_RESET,
209 - .active_low = 1,
210 - }
211 -};
212 -
213 -static struct spi_board_info ap121_spi_info[] = {
214 - {
215 - .bus_num = 0,
216 - .chip_select = 0,
217 - .max_speed_hz = 25000000,
218 - .modalias = "mx25l1606e",
219 - }
220 -};
221 -
222 -static struct ath79_spi_platform_data ap121_spi_data = {
223 - .bus_num = 0,
224 - .num_chipselect = 1,
225 -};
226 -
227 -static void __init ap121_setup(void)
228 -{
229 - u8 *cal_data = (u8 *) KSEG1ADDR(AP121_CAL_DATA_ADDR);
230 -
231 - ath79_register_leds_gpio(-1, ARRAY_SIZE(ap121_leds_gpio),
232 - ap121_leds_gpio);
233 - ath79_register_gpio_keys_polled(-1, AP121_KEYS_POLL_INTERVAL,
234 - ARRAY_SIZE(ap121_gpio_keys),
235 - ap121_gpio_keys);
236 -
237 - ath79_register_spi(&ap121_spi_data, ap121_spi_info,
238 - ARRAY_SIZE(ap121_spi_info));
239 - ath79_register_usb();
240 - ath79_register_wmac(cal_data);
241 -}
242 -
243 -MIPS_MACHINE(ATH79_MACH_AP121, "AP121", "Atheros AP121 reference board",
244 - ap121_setup);
245 --- a/arch/mips/ath79/mach-ap136.c
246 +++ /dev/null
247 @@ -1,156 +0,0 @@
248 -/*
249 - * Qualcomm Atheros AP136 reference board support
250 - *
251 - * Copyright (c) 2012 Qualcomm Atheros
252 - * Copyright (c) 2012-2013 Gabor Juhos <juhosg@openwrt.org>
253 - *
254 - * Permission to use, copy, modify, and/or distribute this software for any
255 - * purpose with or without fee is hereby granted, provided that the above
256 - * copyright notice and this permission notice appear in all copies.
257 - *
258 - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
259 - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
260 - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
261 - * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
262 - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
263 - * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
264 - * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
265 - *
266 - */
267 -
268 -#include <linux/pci.h>
269 -#include <linux/ath9k_platform.h>
270 -
271 -#include "machtypes.h"
272 -#include "dev-gpio-buttons.h"
273 -#include "dev-leds-gpio.h"
274 -#include "dev-spi.h"
275 -#include "dev-usb.h"
276 -#include "dev-wmac.h"
277 -#include "pci.h"
278 -
279 -#define AP136_GPIO_LED_STATUS_RED 14
280 -#define AP136_GPIO_LED_STATUS_GREEN 19
281 -#define AP136_GPIO_LED_USB 4
282 -#define AP136_GPIO_LED_WLAN_2G 13
283 -#define AP136_GPIO_LED_WLAN_5G 12
284 -#define AP136_GPIO_LED_WPS_RED 15
285 -#define AP136_GPIO_LED_WPS_GREEN 20
286 -
287 -#define AP136_GPIO_BTN_WPS 16
288 -#define AP136_GPIO_BTN_RFKILL 21
289 -
290 -#define AP136_KEYS_POLL_INTERVAL 20 /* msecs */
291 -#define AP136_KEYS_DEBOUNCE_INTERVAL (3 * AP136_KEYS_POLL_INTERVAL)
292 -
293 -#define AP136_WMAC_CALDATA_OFFSET 0x1000
294 -#define AP136_PCIE_CALDATA_OFFSET 0x5000
295 -
296 -static struct gpio_led ap136_leds_gpio[] __initdata = {
297 - {
298 - .name = "qca:green:status",
299 - .gpio = AP136_GPIO_LED_STATUS_GREEN,
300 - .active_low = 1,
301 - },
302 - {
303 - .name = "qca:red:status",
304 - .gpio = AP136_GPIO_LED_STATUS_RED,
305 - .active_low = 1,
306 - },
307 - {
308 - .name = "qca:green:wps",
309 - .gpio = AP136_GPIO_LED_WPS_GREEN,
310 - .active_low = 1,
311 - },
312 - {
313 - .name = "qca:red:wps",
314 - .gpio = AP136_GPIO_LED_WPS_RED,
315 - .active_low = 1,
316 - },
317 - {
318 - .name = "qca:red:wlan-2g",
319 - .gpio = AP136_GPIO_LED_WLAN_2G,
320 - .active_low = 1,
321 - },
322 - {
323 - .name = "qca:red:usb",
324 - .gpio = AP136_GPIO_LED_USB,
325 - .active_low = 1,
326 - }
327 -};
328 -
329 -static struct gpio_keys_button ap136_gpio_keys[] __initdata = {
330 - {
331 - .desc = "WPS button",
332 - .type = EV_KEY,
333 - .code = KEY_WPS_BUTTON,
334 - .debounce_interval = AP136_KEYS_DEBOUNCE_INTERVAL,
335 - .gpio = AP136_GPIO_BTN_WPS,
336 - .active_low = 1,
337 - },
338 - {
339 - .desc = "RFKILL button",
340 - .type = EV_KEY,
341 - .code = KEY_RFKILL,
342 - .debounce_interval = AP136_KEYS_DEBOUNCE_INTERVAL,
343 - .gpio = AP136_GPIO_BTN_RFKILL,
344 - .active_low = 1,
345 - },
346 -};
347 -
348 -static struct spi_board_info ap136_spi_info[] = {
349 - {
350 - .bus_num = 0,
351 - .chip_select = 0,
352 - .max_speed_hz = 25000000,
353 - .modalias = "mx25l6405d",
354 - }
355 -};
356 -
357 -static struct ath79_spi_platform_data ap136_spi_data = {
358 - .bus_num = 0,
359 - .num_chipselect = 1,
360 -};
361 -
362 -#ifdef CONFIG_PCI
363 -static struct ath9k_platform_data ap136_ath9k_data;
364 -
365 -static int ap136_pci_plat_dev_init(struct pci_dev *dev)
366 -{
367 - if (dev->bus->number == 1 && (PCI_SLOT(dev->devfn)) == 0)
368 - dev->dev.platform_data = &ap136_ath9k_data;
369 -
370 - return 0;
371 -}
372 -
373 -static void __init ap136_pci_init(u8 *eeprom)
374 -{
375 - memcpy(ap136_ath9k_data.eeprom_data, eeprom,
376 - sizeof(ap136_ath9k_data.eeprom_data));
377 -
378 - ath79_pci_set_plat_dev_init(ap136_pci_plat_dev_init);
379 - ath79_register_pci();
380 -}
381 -#else
382 -static inline void ap136_pci_init(u8 *eeprom) {}
383 -#endif /* CONFIG_PCI */
384 -
385 -static void __init ap136_setup(void)
386 -{
387 - u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
388 -
389 - ath79_register_leds_gpio(-1, ARRAY_SIZE(ap136_leds_gpio),
390 - ap136_leds_gpio);
391 - ath79_register_gpio_keys_polled(-1, AP136_KEYS_POLL_INTERVAL,
392 - ARRAY_SIZE(ap136_gpio_keys),
393 - ap136_gpio_keys);
394 - ath79_register_spi(&ap136_spi_data, ap136_spi_info,
395 - ARRAY_SIZE(ap136_spi_info));
396 - ath79_register_usb();
397 - ath79_register_wmac(art + AP136_WMAC_CALDATA_OFFSET);
398 - ap136_pci_init(art + AP136_PCIE_CALDATA_OFFSET);
399 -}
400 -
401 -MIPS_MACHINE(ATH79_MACH_AP136_010, "AP136-010",
402 - "Atheros AP136-010 reference board",
403 - ap136_setup);
404 --- a/arch/mips/ath79/mach-ap81.c
405 +++ /dev/null
406 @@ -1,100 +0,0 @@
407 -/*
408 - * Atheros AP81 board support
409 - *
410 - * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
411 - * Copyright (C) 2009 Imre Kaloz <kaloz@openwrt.org>
412 - *
413 - * This program is free software; you can redistribute it and/or modify it
414 - * under the terms of the GNU General Public License version 2 as published
415 - * by the Free Software Foundation.
416 - */
417 -
418 -#include "machtypes.h"
419 -#include "dev-wmac.h"
420 -#include "dev-gpio-buttons.h"
421 -#include "dev-leds-gpio.h"
422 -#include "dev-spi.h"
423 -#include "dev-usb.h"
424 -
425 -#define AP81_GPIO_LED_STATUS 1
426 -#define AP81_GPIO_LED_AOSS 3
427 -#define AP81_GPIO_LED_WLAN 6
428 -#define AP81_GPIO_LED_POWER 14
429 -
430 -#define AP81_GPIO_BTN_SW4 12
431 -#define AP81_GPIO_BTN_SW1 21
432 -
433 -#define AP81_KEYS_POLL_INTERVAL 20 /* msecs */
434 -#define AP81_KEYS_DEBOUNCE_INTERVAL (3 * AP81_KEYS_POLL_INTERVAL)
435 -
436 -#define AP81_CAL_DATA_ADDR 0x1fff1000
437 -
438 -static struct gpio_led ap81_leds_gpio[] __initdata = {
439 - {
440 - .name = "ap81:green:status",
441 - .gpio = AP81_GPIO_LED_STATUS,
442 - .active_low = 1,
443 - }, {
444 - .name = "ap81:amber:aoss",
445 - .gpio = AP81_GPIO_LED_AOSS,
446 - .active_low = 1,
447 - }, {
448 - .name = "ap81:green:wlan",
449 - .gpio = AP81_GPIO_LED_WLAN,
450 - .active_low = 1,
451 - }, {
452 - .name = "ap81:green:power",
453 - .gpio = AP81_GPIO_LED_POWER,
454 - .active_low = 1,
455 - }
456 -};
457 -
458 -static struct gpio_keys_button ap81_gpio_keys[] __initdata = {
459 - {
460 - .desc = "sw1",
461 - .type = EV_KEY,
462 - .code = BTN_0,
463 - .debounce_interval = AP81_KEYS_DEBOUNCE_INTERVAL,
464 - .gpio = AP81_GPIO_BTN_SW1,
465 - .active_low = 1,
466 - } , {
467 - .desc = "sw4",
468 - .type = EV_KEY,
469 - .code = BTN_1,
470 - .debounce_interval = AP81_KEYS_DEBOUNCE_INTERVAL,
471 - .gpio = AP81_GPIO_BTN_SW4,
472 - .active_low = 1,
473 - }
474 -};
475 -
476 -static struct spi_board_info ap81_spi_info[] = {
477 - {
478 - .bus_num = 0,
479 - .chip_select = 0,
480 - .max_speed_hz = 25000000,
481 - .modalias = "m25p64",
482 - }
483 -};
484 -
485 -static struct ath79_spi_platform_data ap81_spi_data = {
486 - .bus_num = 0,
487 - .num_chipselect = 1,
488 -};
489 -
490 -static void __init ap81_setup(void)
491 -{
492 - u8 *cal_data = (u8 *) KSEG1ADDR(AP81_CAL_DATA_ADDR);
493 -
494 - ath79_register_leds_gpio(-1, ARRAY_SIZE(ap81_leds_gpio),
495 - ap81_leds_gpio);
496 - ath79_register_gpio_keys_polled(-1, AP81_KEYS_POLL_INTERVAL,
497 - ARRAY_SIZE(ap81_gpio_keys),
498 - ap81_gpio_keys);
499 - ath79_register_spi(&ap81_spi_data, ap81_spi_info,
500 - ARRAY_SIZE(ap81_spi_info));
501 - ath79_register_wmac(cal_data);
502 - ath79_register_usb();
503 -}
504 -
505 -MIPS_MACHINE(ATH79_MACH_AP81, "AP81", "Atheros AP81 reference board",
506 - ap81_setup);
507 --- a/arch/mips/ath79/mach-db120.c
508 +++ /dev/null
509 @@ -1,136 +0,0 @@
510 -/*
511 - * Atheros DB120 reference board support
512 - *
513 - * Copyright (c) 2011 Qualcomm Atheros
514 - * Copyright (c) 2011 Gabor Juhos <juhosg@openwrt.org>
515 - *
516 - * Permission to use, copy, modify, and/or distribute this software for any
517 - * purpose with or without fee is hereby granted, provided that the above
518 - * copyright notice and this permission notice appear in all copies.
519 - *
520 - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
521 - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
522 - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
523 - * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
524 - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
525 - * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
526 - * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
527 - *
528 - */
529 -
530 -#include <linux/pci.h>
531 -#include <linux/ath9k_platform.h>
532 -
533 -#include "machtypes.h"
534 -#include "dev-gpio-buttons.h"
535 -#include "dev-leds-gpio.h"
536 -#include "dev-spi.h"
537 -#include "dev-usb.h"
538 -#include "dev-wmac.h"
539 -#include "pci.h"
540 -
541 -#define DB120_GPIO_LED_WLAN_5G 12
542 -#define DB120_GPIO_LED_WLAN_2G 13
543 -#define DB120_GPIO_LED_STATUS 14
544 -#define DB120_GPIO_LED_WPS 15
545 -
546 -#define DB120_GPIO_BTN_WPS 16
547 -
548 -#define DB120_KEYS_POLL_INTERVAL 20 /* msecs */
549 -#define DB120_KEYS_DEBOUNCE_INTERVAL (3 * DB120_KEYS_POLL_INTERVAL)
550 -
551 -#define DB120_WMAC_CALDATA_OFFSET 0x1000
552 -#define DB120_PCIE_CALDATA_OFFSET 0x5000
553 -
554 -static struct gpio_led db120_leds_gpio[] __initdata = {
555 - {
556 - .name = "db120:green:status",
557 - .gpio = DB120_GPIO_LED_STATUS,
558 - .active_low = 1,
559 - },
560 - {
561 - .name = "db120:green:wps",
562 - .gpio = DB120_GPIO_LED_WPS,
563 - .active_low = 1,
564 - },
565 - {
566 - .name = "db120:green:wlan-5g",
567 - .gpio = DB120_GPIO_LED_WLAN_5G,
568 - .active_low = 1,
569 - },
570 - {
571 - .name = "db120:green:wlan-2g",
572 - .gpio = DB120_GPIO_LED_WLAN_2G,
573 - .active_low = 1,
574 - },
575 -};
576 -
577 -static struct gpio_keys_button db120_gpio_keys[] __initdata = {
578 - {
579 - .desc = "WPS button",
580 - .type = EV_KEY,
581 - .code = KEY_WPS_BUTTON,
582 - .debounce_interval = DB120_KEYS_DEBOUNCE_INTERVAL,
583 - .gpio = DB120_GPIO_BTN_WPS,
584 - .active_low = 1,
585 - },
586 -};
587 -
588 -static struct spi_board_info db120_spi_info[] = {
589 - {
590 - .bus_num = 0,
591 - .chip_select = 0,
592 - .max_speed_hz = 25000000,
593 - .modalias = "s25sl064a",
594 - }
595 -};
596 -
597 -static struct ath79_spi_platform_data db120_spi_data = {
598 - .bus_num = 0,
599 - .num_chipselect = 1,
600 -};
601 -
602 -#ifdef CONFIG_PCI
603 -static struct ath9k_platform_data db120_ath9k_data;
604 -
605 -static int db120_pci_plat_dev_init(struct pci_dev *dev)
606 -{
607 - switch (PCI_SLOT(dev->devfn)) {
608 - case 0:
609 - dev->dev.platform_data = &db120_ath9k_data;
610 - break;
611 - }
612 -
613 - return 0;
614 -}
615 -
616 -static void __init db120_pci_init(u8 *eeprom)
617 -{
618 - memcpy(db120_ath9k_data.eeprom_data, eeprom,
619 - sizeof(db120_ath9k_data.eeprom_data));
620 -
621 - ath79_pci_set_plat_dev_init(db120_pci_plat_dev_init);
622 - ath79_register_pci();
623 -}
624 -#else
625 -static inline void db120_pci_init(u8 *eeprom) {}
626 -#endif /* CONFIG_PCI */
627 -
628 -static void __init db120_setup(void)
629 -{
630 - u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
631 -
632 - ath79_register_leds_gpio(-1, ARRAY_SIZE(db120_leds_gpio),
633 - db120_leds_gpio);
634 - ath79_register_gpio_keys_polled(-1, DB120_KEYS_POLL_INTERVAL,
635 - ARRAY_SIZE(db120_gpio_keys),
636 - db120_gpio_keys);
637 - ath79_register_spi(&db120_spi_data, db120_spi_info,
638 - ARRAY_SIZE(db120_spi_info));
639 - ath79_register_usb();
640 - ath79_register_wmac(art + DB120_WMAC_CALDATA_OFFSET);
641 - db120_pci_init(art + DB120_PCIE_CALDATA_OFFSET);
642 -}
643 -
644 -MIPS_MACHINE(ATH79_MACH_DB120, "DB120", "Atheros DB120 reference board",
645 - db120_setup);
646 --- a/arch/mips/ath79/mach-pb44.c
647 +++ /dev/null
648 @@ -1,128 +0,0 @@
649 -/*
650 - * Atheros PB44 reference board support
651 - *
652 - * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
653 - *
654 - * This program is free software; you can redistribute it and/or modify it
655 - * under the terms of the GNU General Public License version 2 as published
656 - * by the Free Software Foundation.
657 - */
658 -
659 -#include <linux/init.h>
660 -#include <linux/platform_device.h>
661 -#include <linux/i2c.h>
662 -#include <linux/gpio/machine.h>
663 -#include <linux/platform_data/pcf857x.h>
664 -
665 -#include "machtypes.h"
666 -#include "dev-gpio-buttons.h"
667 -#include "dev-leds-gpio.h"
668 -#include "dev-spi.h"
669 -#include "dev-usb.h"
670 -#include "pci.h"
671 -
672 -#define PB44_GPIO_I2C_SCL 0
673 -#define PB44_GPIO_I2C_SDA 1
674 -
675 -#define PB44_GPIO_EXP_BASE 16
676 -#define PB44_GPIO_SW_RESET (PB44_GPIO_EXP_BASE + 6)
677 -#define PB44_GPIO_SW_JUMP (PB44_GPIO_EXP_BASE + 8)
678 -#define PB44_GPIO_LED_JUMP1 (PB44_GPIO_EXP_BASE + 9)
679 -#define PB44_GPIO_LED_JUMP2 (PB44_GPIO_EXP_BASE + 10)
680 -
681 -#define PB44_KEYS_POLL_INTERVAL 20 /* msecs */
682 -#define PB44_KEYS_DEBOUNCE_INTERVAL (3 * PB44_KEYS_POLL_INTERVAL)
683 -
684 -static struct gpiod_lookup_table pb44_i2c_gpiod_table = {
685 - .dev_id = "i2c-gpio.0",
686 - .table = {
687 - GPIO_LOOKUP_IDX("ath79-gpio", PB44_GPIO_I2C_SDA,
688 - NULL, 0, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
689 - GPIO_LOOKUP_IDX("ath79-gpio", PB44_GPIO_I2C_SCL,
690 - NULL, 1, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
691 - },
692 -};
693 -
694 -static struct platform_device pb44_i2c_gpio_device = {
695 - .name = "i2c-gpio",
696 - .id = 0,
697 - .dev = {
698 - .platform_data = NULL,
699 - }
700 -};
701 -
702 -static struct pcf857x_platform_data pb44_pcf857x_data = {
703 - .gpio_base = PB44_GPIO_EXP_BASE,
704 -};
705 -
706 -static struct i2c_board_info pb44_i2c_board_info[] __initdata = {
707 - {
708 - I2C_BOARD_INFO("pcf8575", 0x20),
709 - .platform_data = &pb44_pcf857x_data,
710 - },
711 -};
712 -
713 -static struct gpio_led pb44_leds_gpio[] __initdata = {
714 - {
715 - .name = "pb44:amber:jump1",
716 - .gpio = PB44_GPIO_LED_JUMP1,
717 - .active_low = 1,
718 - }, {
719 - .name = "pb44:green:jump2",
720 - .gpio = PB44_GPIO_LED_JUMP2,
721 - .active_low = 1,
722 - },
723 -};
724 -
725 -static struct gpio_keys_button pb44_gpio_keys[] __initdata = {
726 - {
727 - .desc = "soft_reset",
728 - .type = EV_KEY,
729 - .code = KEY_RESTART,
730 - .debounce_interval = PB44_KEYS_DEBOUNCE_INTERVAL,
731 - .gpio = PB44_GPIO_SW_RESET,
732 - .active_low = 1,
733 - } , {
734 - .desc = "jumpstart",
735 - .type = EV_KEY,
736 - .code = KEY_WPS_BUTTON,
737 - .debounce_interval = PB44_KEYS_DEBOUNCE_INTERVAL,
738 - .gpio = PB44_GPIO_SW_JUMP,
739 - .active_low = 1,
740 - }
741 -};
742 -
743 -static struct spi_board_info pb44_spi_info[] = {
744 - {
745 - .bus_num = 0,
746 - .chip_select = 0,
747 - .max_speed_hz = 25000000,
748 - .modalias = "m25p64",
749 - },
750 -};
751 -
752 -static struct ath79_spi_platform_data pb44_spi_data = {
753 - .bus_num = 0,
754 - .num_chipselect = 1,
755 -};
756 -
757 -static void __init pb44_init(void)
758 -{
759 - gpiod_add_lookup_table(&pb44_i2c_gpiod_table);
760 - i2c_register_board_info(0, pb44_i2c_board_info,
761 - ARRAY_SIZE(pb44_i2c_board_info));
762 - platform_device_register(&pb44_i2c_gpio_device);
763 -
764 - ath79_register_leds_gpio(-1, ARRAY_SIZE(pb44_leds_gpio),
765 - pb44_leds_gpio);
766 - ath79_register_gpio_keys_polled(-1, PB44_KEYS_POLL_INTERVAL,
767 - ARRAY_SIZE(pb44_gpio_keys),
768 - pb44_gpio_keys);
769 - ath79_register_spi(&pb44_spi_data, pb44_spi_info,
770 - ARRAY_SIZE(pb44_spi_info));
771 - ath79_register_usb();
772 - ath79_register_pci();
773 -}
774 -
775 -MIPS_MACHINE(ATH79_MACH_PB44, "PB44", "Atheros PB44 reference board",
776 - pb44_init);
777 --- a/arch/mips/ath79/mach-ubnt-xm.c
778 +++ /dev/null
779 @@ -1,126 +0,0 @@
780 -/*
781 - * Ubiquiti Networks XM (rev 1.0) board support
782 - *
783 - * Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com>
784 - *
785 - * Derived from: mach-pb44.c
786 - *
787 - * This program is free software; you can redistribute it and/or modify it
788 - * under the terms of the GNU General Public License version 2 as published
789 - * by the Free Software Foundation.
790 - */
791 -
792 -#include <linux/init.h>
793 -#include <linux/pci.h>
794 -#include <linux/ath9k_platform.h>
795 -
796 -#include <asm/mach-ath79/irq.h>
797 -
798 -#include "machtypes.h"
799 -#include "dev-gpio-buttons.h"
800 -#include "dev-leds-gpio.h"
801 -#include "dev-spi.h"
802 -#include "pci.h"
803 -
804 -#define UBNT_XM_GPIO_LED_L1 0
805 -#define UBNT_XM_GPIO_LED_L2 1
806 -#define UBNT_XM_GPIO_LED_L3 11
807 -#define UBNT_XM_GPIO_LED_L4 7
808 -
809 -#define UBNT_XM_GPIO_BTN_RESET 12
810 -
811 -#define UBNT_XM_KEYS_POLL_INTERVAL 20
812 -#define UBNT_XM_KEYS_DEBOUNCE_INTERVAL (3 * UBNT_XM_KEYS_POLL_INTERVAL)
813 -
814 -#define UBNT_XM_EEPROM_ADDR (u8 *) KSEG1ADDR(0x1fff1000)
815 -
816 -static struct gpio_led ubnt_xm_leds_gpio[] __initdata = {
817 - {
818 - .name = "ubnt-xm:red:link1",
819 - .gpio = UBNT_XM_GPIO_LED_L1,
820 - .active_low = 0,
821 - }, {
822 - .name = "ubnt-xm:orange:link2",
823 - .gpio = UBNT_XM_GPIO_LED_L2,
824 - .active_low = 0,
825 - }, {
826 - .name = "ubnt-xm:green:link3",
827 - .gpio = UBNT_XM_GPIO_LED_L3,
828 - .active_low = 0,
829 - }, {
830 - .name = "ubnt-xm:green:link4",
831 - .gpio = UBNT_XM_GPIO_LED_L4,
832 - .active_low = 0,
833 - },
834 -};
835 -
836 -static struct gpio_keys_button ubnt_xm_gpio_keys[] __initdata = {
837 - {
838 - .desc = "reset",
839 - .type = EV_KEY,
840 - .code = KEY_RESTART,
841 - .debounce_interval = UBNT_XM_KEYS_DEBOUNCE_INTERVAL,
842 - .gpio = UBNT_XM_GPIO_BTN_RESET,
843 - .active_low = 1,
844 - }
845 -};
846 -
847 -static struct spi_board_info ubnt_xm_spi_info[] = {
848 - {
849 - .bus_num = 0,
850 - .chip_select = 0,
851 - .max_speed_hz = 25000000,
852 - .modalias = "mx25l6405d",
853 - }
854 -};
855 -
856 -static struct ath79_spi_platform_data ubnt_xm_spi_data = {
857 - .bus_num = 0,
858 - .num_chipselect = 1,
859 -};
860 -
861 -#ifdef CONFIG_PCI
862 -static struct ath9k_platform_data ubnt_xm_eeprom_data;
863 -
864 -static int ubnt_xm_pci_plat_dev_init(struct pci_dev *dev)
865 -{
866 - switch (PCI_SLOT(dev->devfn)) {
867 - case 0:
868 - dev->dev.platform_data = &ubnt_xm_eeprom_data;
869 - break;
870 - }
871 -
872 - return 0;
873 -}
874 -
875 -static void __init ubnt_xm_pci_init(void)
876 -{
877 - memcpy(ubnt_xm_eeprom_data.eeprom_data, UBNT_XM_EEPROM_ADDR,
878 - sizeof(ubnt_xm_eeprom_data.eeprom_data));
879 -
880 - ath79_pci_set_plat_dev_init(ubnt_xm_pci_plat_dev_init);
881 - ath79_register_pci();
882 -}
883 -#else
884 -static inline void ubnt_xm_pci_init(void) {}
885 -#endif /* CONFIG_PCI */
886 -
887 -static void __init ubnt_xm_init(void)
888 -{
889 - ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_xm_leds_gpio),
890 - ubnt_xm_leds_gpio);
891 -
892 - ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL,
893 - ARRAY_SIZE(ubnt_xm_gpio_keys),
894 - ubnt_xm_gpio_keys);
895 -
896 - ath79_register_spi(&ubnt_xm_spi_data, ubnt_xm_spi_info,
897 - ARRAY_SIZE(ubnt_xm_spi_info));
898 -
899 - ubnt_xm_pci_init();
900 -}
901 -
902 -MIPS_MACHINE(ATH79_MACH_UBNT_XM,
903 - "UBNT-XM",
904 - "Ubiquiti Networks XM (rev 1.0) board",
905 - ubnt_xm_init);
906 --- a/arch/mips/ath79/machtypes.h
907 +++ /dev/null
908 @@ -1,28 +0,0 @@
909 -/*
910 - * Atheros AR71XX/AR724X/AR913X machine type definitions
911 - *
912 - * Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
913 - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
914 - *
915 - * This program is free software; you can redistribute it and/or modify it
916 - * under the terms of the GNU General Public License version 2 as published
917 - * by the Free Software Foundation.
918 - */
919 -
920 -#ifndef _ATH79_MACHTYPE_H
921 -#define _ATH79_MACHTYPE_H
922 -
923 -#include <asm/mips_machine.h>
924 -
925 -enum ath79_mach_type {
926 - ATH79_MACH_GENERIC_OF = -1, /* Device tree board */
927 - ATH79_MACH_GENERIC = 0,
928 - ATH79_MACH_AP121, /* Atheros AP121 reference board */
929 - ATH79_MACH_AP136_010, /* Atheros AP136-010 reference board */
930 - ATH79_MACH_AP81, /* Atheros AP81 reference board */
931 - ATH79_MACH_DB120, /* Atheros DB120 reference board */
932 - ATH79_MACH_PB44, /* Atheros PB44 reference board */
933 - ATH79_MACH_UBNT_XM, /* Ubiquiti Networks XM board rev 1.0 */
934 -};
935 -
936 -#endif /* _ATH79_MACHTYPE_H */
937 --- a/arch/mips/ath79/setup.c
938 +++ b/arch/mips/ath79/setup.c
939 @@ -33,7 +33,6 @@
940 #include <asm/mach-ath79/ar71xx_regs.h>
941 #include "common.h"
942 #include "dev-common.h"
943 -#include "machtypes.h"
944
945 #define ATH79_SYS_TYPE_LEN 64
946
947 @@ -230,25 +229,21 @@ void __init plat_mem_setup(void)
948 else if (fw_passed_dtb)
949 __dt_setup_arch((void *)KSEG0ADDR(fw_passed_dtb));
950
951 - if (mips_machtype != ATH79_MACH_GENERIC_OF) {
952 - ath79_reset_base = ioremap_nocache(AR71XX_RESET_BASE,
953 - AR71XX_RESET_SIZE);
954 - ath79_pll_base = ioremap_nocache(AR71XX_PLL_BASE,
955 - AR71XX_PLL_SIZE);
956 - ath79_detect_sys_type();
957 - ath79_ddr_ctrl_init();
958 + ath79_reset_base = ioremap_nocache(AR71XX_RESET_BASE,
959 + AR71XX_RESET_SIZE);
960 + ath79_pll_base = ioremap_nocache(AR71XX_PLL_BASE,
961 + AR71XX_PLL_SIZE);
962 + ath79_detect_sys_type();
963 + ath79_ddr_ctrl_init();
964
965 - detect_memory_region(0, ATH79_MEM_SIZE_MIN, ATH79_MEM_SIZE_MAX);
966 -
967 - /* OF machines should use the reset driver */
968 - _machine_restart = ath79_restart;
969 - }
970 + detect_memory_region(0, ATH79_MEM_SIZE_MIN, ATH79_MEM_SIZE_MAX);
971
972 + _machine_restart = ath79_restart;
973 _machine_halt = ath79_halt;
974 pm_power_off = ath79_halt;
975 }
976
977 -static void __init ath79_of_plat_time_init(void)
978 +void __init plat_time_init(void)
979 {
980 struct device_node *np;
981 struct clk *clk;
982 @@ -278,66 +273,12 @@ static void __init ath79_of_plat_time_in
983 clk_put(clk);
984 }
985
986 -void __init plat_time_init(void)
987 -{
988 - unsigned long cpu_clk_rate;
989 - unsigned long ahb_clk_rate;
990 - unsigned long ddr_clk_rate;
991 - unsigned long ref_clk_rate;
992 -
993 - if (IS_ENABLED(CONFIG_OF) && mips_machtype == ATH79_MACH_GENERIC_OF) {
994 - ath79_of_plat_time_init();
995 - return;
996 - }
997 -
998 - ath79_clocks_init();
999 -
1000 - cpu_clk_rate = ath79_get_sys_clk_rate("cpu");
1001 - ahb_clk_rate = ath79_get_sys_clk_rate("ahb");
1002 - ddr_clk_rate = ath79_get_sys_clk_rate("ddr");
1003 - ref_clk_rate = ath79_get_sys_clk_rate("ref");
1004 -
1005 - pr_info("Clocks: CPU:%lu.%03luMHz, DDR:%lu.%03luMHz, AHB:%lu.%03luMHz, Ref:%lu.%03luMHz\n",
1006 - cpu_clk_rate / 1000000, (cpu_clk_rate / 1000) % 1000,
1007 - ddr_clk_rate / 1000000, (ddr_clk_rate / 1000) % 1000,
1008 - ahb_clk_rate / 1000000, (ahb_clk_rate / 1000) % 1000,
1009 - ref_clk_rate / 1000000, (ref_clk_rate / 1000) % 1000);
1010 -
1011 - mips_hpt_frequency = cpu_clk_rate / 2;
1012 -}
1013 -
1014 void __init arch_init_irq(void)
1015 {
1016 irqchip_init();
1017 }
1018
1019 -static int __init ath79_setup(void)
1020 -{
1021 - if (mips_machtype == ATH79_MACH_GENERIC_OF)
1022 - return 0;
1023 -
1024 - ath79_gpio_init();
1025 - ath79_register_uart();
1026 - ath79_register_wdt();
1027 -
1028 - mips_machine_setup();
1029 -
1030 - return 0;
1031 -}
1032 -
1033 -arch_initcall(ath79_setup);
1034 -
1035 void __init device_tree_init(void)
1036 {
1037 unflatten_and_copy_device_tree();
1038 }
1039 -
1040 -MIPS_MACHINE(ATH79_MACH_GENERIC,
1041 - "Generic",
1042 - "Generic AR71XX/AR724X/AR913X based board",
1043 - NULL);
1044 -
1045 -MIPS_MACHINE(ATH79_MACH_GENERIC_OF,
1046 - "DTB",
1047 - "Generic AR71XX/AR724X/AR913X based board (DT)",
1048 - NULL);
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