target/linux/atheros-2.6/files/drivers/net/ar2313/platform.h

   1 /********************************************************************************
   2    Title:   $Source: platform.h,v $
   3
   4    Author:  Dan Steinberg
   5             Copyright Integrated Device Technology 2001
   6
   7    Purpose: AR2313 Register/Bit Definitions
   8
   9    Update:
  10             $Log: platform.h,v $
  11
  12    Notes:   See Merlot architecture spec for complete details.  Note, all
  13             addresses are virtual addresses in kseg1 (Uncached, Unmapped).
  14
  15 ********************************************************************************/
  16
  17 #ifndef PLATFORM_H
  18 #define PLATFORM_H
  19
  20 #define BIT(x) (1 << (x))
  21
  22 #define RESET_BASE        0xBC003020
  23 #define RESET_VALUE       0x00000001
  24
  25 /********************************************************************
  26  * Device controller
  27  ********************************************************************/
  28 typedef struct {
  29   volatile unsigned int flash0;
  30 } DEVICE;
  31
  32 #define device (*((volatile DEVICE *) DEV_CTL_BASE))
  33
  34 // DDRC register
  35 #define DEV_WP        (1<<26)
  36
  37 /********************************************************************
  38  * DDR controller
  39  ********************************************************************/
  40 typedef struct {
  41   volatile unsigned int ddrc0;
  42   volatile unsigned int ddrc1;
  43   volatile unsigned int ddrrefresh;
  44 } DDR;
  45
  46 #define ddr (*((volatile DDR *) DDR_BASE))
  47
  48 // DDRC register
  49 #define DDRC_CS(i)     ((i&0x3)<<0)
  50 #define DDRC_WE        (1<<2)
  51
  52 /********************************************************************
  53  * Ethernet interfaces
  54  ********************************************************************/
  55 #define ETHERNET_BASE    0xB8200000
  56
  57 //
  58 // New Combo structure for Both Eth0 AND eth1
  59 //
  60 typedef struct {
  61   volatile unsigned int mac_control;    /* 0x00 */
  62   volatile unsigned int mac_addr[2];    /* 0x04 - 0x08*/
  63   volatile unsigned int mcast_table[2]; /* 0x0c - 0x10 */
  64   volatile unsigned int mii_addr;       /* 0x14 */
  65   volatile unsigned int mii_data;       /* 0x18 */
  66   volatile unsigned int flow_control;   /* 0x1c */
  67   volatile unsigned int vlan_tag;       /* 0x20 */
  68   volatile unsigned int pad[7];         /* 0x24 - 0x3c */
  69   volatile unsigned int ucast_table[8]; /* 0x40-0x5c */
  70
  71 } ETHERNET_STRUCT;
  72
  73 /********************************************************************
  74  * Interrupt controller
  75  ********************************************************************/
  76
  77 typedef struct {
  78   volatile unsigned int wdog_control;           /* 0x08 */
  79   volatile unsigned int wdog_timer;             /* 0x0c */
  80   volatile unsigned int misc_status;            /* 0x10 */
  81   volatile unsigned int misc_mask;              /* 0x14 */
  82   volatile unsigned int global_status;          /* 0x18 */
  83   volatile unsigned int reserved;               /* 0x1c */
  84   volatile unsigned int reset_control;          /* 0x20 */
  85 } INTERRUPT;
  86
  87 #define interrupt (*((volatile INTERRUPT *) INTERRUPT_BASE))
  88
  89 #define INTERRUPT_MISC_TIMER    BIT(0)
  90 #define INTERRUPT_MISC_AHBPROC  BIT(1)
  91 #define INTERRUPT_MISC_AHBDMA   BIT(2)
  92 #define INTERRUPT_MISC_GPIO     BIT(3)
  93 #define INTERRUPT_MISC_UART     BIT(4)
  94 #define INTERRUPT_MISC_UARTDMA  BIT(5)
  95 #define INTERRUPT_MISC_WATCHDOG BIT(6)
  96 #define INTERRUPT_MISC_LOCAL    BIT(7)
  97
  98 #define INTERRUPT_GLOBAL_ETH    BIT(2)
  99 #define INTERRUPT_GLOBAL_WLAN   BIT(3)
 100 #define INTERRUPT_GLOBAL_MISC   BIT(4)
 101 #define INTERRUPT_GLOBAL_ITIMER BIT(5)
 102
 103 /********************************************************************
 104  * DMA controller
 105  ********************************************************************/
 106 #define DMA_BASE          0xB8201000
 107
 108 typedef struct {
 109   volatile unsigned int bus_mode;        /* 0x00 (CSR0) */
 110   volatile unsigned int xmt_poll;        /* 0x04 (CSR1) */
 111   volatile unsigned int rcv_poll;        /* 0x08 (CSR2) */
 112   volatile unsigned int rcv_base;        /* 0x0c (CSR3) */
 113   volatile unsigned int xmt_base;        /* 0x10 (CSR4) */
 114   volatile unsigned int status;          /* 0x14 (CSR5) */
 115   volatile unsigned int control;         /* 0x18 (CSR6) */
 116   volatile unsigned int intr_ena;        /* 0x1c (CSR7) */
 117   volatile unsigned int rcv_missed;      /* 0x20 (CSR8) */
 118   volatile unsigned int reserved[11];    /* 0x24-0x4c (CSR9-19) */
 119   volatile unsigned int cur_tx_buf_addr; /* 0x50 (CSR20) */
 120   volatile unsigned int cur_rx_buf_addr; /* 0x50 (CSR21) */
 121 } DMA;
 122
 123 #define dma (*((volatile DMA *) DMA_BASE))
 124
 125 // macro to convert from virtual to physical address
 126 #define phys_addr(x)      (x & 0x1fffffff)
 127
 128 #endif /* PLATFORM_H */