target/linux/bcm27xx/patches-5.4/950-1015-ARM-dts-Add-bcm2711-rpi-400.dts.patch

   1 From 37034aa6ba14c346f67e8b99a317c45e40f0a2eb Mon Sep 17 00:00:00 2001
   2 From: Phil Elwell <phil@raspberrypi.com>
   3 Date: Tue, 14 Jul 2020 14:21:33 +0100
   4 Subject: [PATCH] ARM: dts: Add bcm2711-rpi-400.dts
   5
   6 Signed-off-by: Phil Elwell <phil@raspberrypi.com>
   7 ---
   8  arch/arm/boot/dts/Makefile                    |   1 +
   9  arch/arm/boot/dts/bcm2711-rpi-400.dts         | 585 ++++++++++++++++++
  10  arch/arm64/boot/dts/broadcom/Makefile         |   1 +
  11  .../boot/dts/broadcom/bcm2711-rpi-400.dts     |   1 +
  12  4 files changed, 588 insertions(+)
  13  create mode 100644 arch/arm/boot/dts/bcm2711-rpi-400.dts
  14  create mode 100644 arch/arm64/boot/dts/broadcom/bcm2711-rpi-400.dts
  15
  16 --- a/arch/arm/boot/dts/Makefile
  17 +++ b/arch/arm/boot/dts/Makefile
  18 @@ -12,6 +12,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += \
  19         bcm2710-rpi-3-b.dtb \
  20         bcm2710-rpi-3-b-plus.dtb \
  21         bcm2711-rpi-4-b.dtb \
  22 +       bcm2711-rpi-400.dtb \
  23         bcm2710-rpi-cm3.dtb \
  24         bcm2711-rpi-cm4.dtb
  25
  26 --- /dev/null
  27 +++ b/arch/arm/boot/dts/bcm2711-rpi-400.dts
  28 @@ -0,0 +1,585 @@
  29 +// SPDX-License-Identifier: GPL-2.0
  30 +/dts-v1/;
  31 +#include "bcm2711.dtsi"
  32 +#include "bcm2835-rpi.dtsi"
  33 +
  34 +/ {
  35 +       compatible = "raspberrypi,400", "brcm,bcm2711";
  36 +       model = "Raspberry Pi 400";
  37 +
  38 +       chosen {
  39 +               /* 8250 auxiliary UART instead of pl011 */
  40 +               stdout-path = "serial1:115200n8";
  41 +       };
  42 +
  43 +       /* Will be filled by the bootloader */
  44 +       memory@0 {
  45 +               device_type = "memory";
  46 +               reg = <0 0 0>;
  47 +       };
  48 +
  49 +       aliases {
  50 +               emmc2bus = &emmc2bus;
  51 +               ethernet0 = &genet;
  52 +               pcie0 = &pcie0;
  53 +       };
  54 +
  55 +       leds {
  56 +               act {
  57 +                       gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
  58 +               };
  59 +
  60 +               pwr {
  61 +                       label = "PWR";
  62 +                       gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
  63 +                       default-state = "keep";
  64 +                       linux,default-trigger = "default-on";
  65 +               };
  66 +       };
  67 +
  68 +       wifi_pwrseq: wifi-pwrseq {
  69 +               compatible = "mmc-pwrseq-simple";
  70 +               reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>;
  71 +       };
  72 +
  73 +       sd_io_1v8_reg: sd_io_1v8_reg {
  74 +               compatible = "regulator-gpio";
  75 +               regulator-name = "vdd-sd-io";
  76 +               regulator-min-microvolt = <1800000>;
  77 +               regulator-max-microvolt = <3300000>;
  78 +               regulator-boot-on;
  79 +               regulator-always-on;
  80 +               regulator-settling-time-us = <5000>;
  81 +               gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>;
  82 +               states = <1800000 0x1
  83 +                         3300000 0x0>;
  84 +               status = "okay";
  85 +       };
  86 +};
  87 +
  88 +&firmware {
  89 +       expgpio: gpio {
  90 +               compatible = "raspberrypi,firmware-gpio";
  91 +               gpio-controller;
  92 +               #gpio-cells = <2>;
  93 +               gpio-line-names = "BT_ON",
  94 +                                 "WL_ON",
  95 +                                 "PWR_LED_OFF",
  96 +                                 "GLOBAL_RESET",
  97 +                                 "VDD_SD_IO_SEL",
  98 +                                 "CAM_GPIO",
  99 +                                 "SD_PWR_ON",
 100 +                                 "SD_OC_N";
 101 +               status = "okay";
 102 +       };
 103 +};
 104 +
 105 +&gpio {
 106 +       /*
 107 +        * Parts taken from rpi_SCH_4b_4p0_reduced.pdf and
 108 +        * the official GPU firmware DT blob.
 109 +        *
 110 +        * Legend:
 111 +        * "FOO" = GPIO line named "FOO" on the schematic
 112 +        * "FOO_N" = GPIO line named "FOO" on schematic, active low
 113 +        */
 114 +       gpio-line-names = "ID_SDA",
 115 +                         "ID_SCL",
 116 +                         "SDA1",
 117 +                         "SCL1",
 118 +                         "GPIO_GCLK",
 119 +                         "GPIO5",
 120 +                         "GPIO6",
 121 +                         "SPI_CE1_N",
 122 +                         "SPI_CE0_N",
 123 +                         "SPI_MISO",
 124 +                         "SPI_MOSI",
 125 +                         "SPI_SCLK",
 126 +                         "GPIO12",
 127 +                         "GPIO13",
 128 +                         /* Serial port */
 129 +                         "TXD1",
 130 +                         "RXD1",
 131 +                         "GPIO16",
 132 +                         "GPIO17",
 133 +                         "GPIO18",
 134 +                         "GPIO19",
 135 +                         "GPIO20",
 136 +                         "GPIO21",
 137 +                         "GPIO22",
 138 +                         "GPIO23",
 139 +                         "GPIO24",
 140 +                         "GPIO25",
 141 +                         "GPIO26",
 142 +                         "GPIO27",
 143 +                         "RGMII_MDIO",
 144 +                         "RGMIO_MDC",
 145 +                         /* Used by BT module */
 146 +                         "CTS0",
 147 +                         "RTS0",
 148 +                         "TXD0",
 149 +                         "RXD0",
 150 +                         /* Used by Wifi */
 151 +                         "SD1_CLK",
 152 +                         "SD1_CMD",
 153 +                         "SD1_DATA0",
 154 +                         "SD1_DATA1",
 155 +                         "SD1_DATA2",
 156 +                         "SD1_DATA3",
 157 +                         /* Shared with SPI flash */
 158 +                         "PWM0_MISO",
 159 +                         "PWM1_MOSI",
 160 +                         "STATUS_LED_G_CLK",
 161 +                         "SPIFLASH_CE_N",
 162 +                         "SDA0",
 163 +                         "SCL0",
 164 +                         "RGMII_RXCLK",
 165 +                         "RGMII_RXCTL",
 166 +                         "RGMII_RXD0",
 167 +                         "RGMII_RXD1",
 168 +                         "RGMII_RXD2",
 169 +                         "RGMII_RXD3",
 170 +                         "RGMII_TXCLK",
 171 +                         "RGMII_TXCTL",
 172 +                         "RGMII_TXD0",
 173 +                         "RGMII_TXD1",
 174 +                         "RGMII_TXD2",
 175 +                         "RGMII_TXD3";
 176 +};
 177 +
 178 +&pwm1 {
 179 +       pinctrl-names = "default";
 180 +       pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>;
 181 +       status = "okay";
 182 +};
 183 +
 184 +/* SDHCI is used to control the SDIO for wireless */
 185 +&sdhci {
 186 +       #address-cells = <1>;
 187 +       #size-cells = <0>;
 188 +       pinctrl-names = "default";
 189 +       pinctrl-0 = <&emmc_gpio34>;
 190 +       bus-width = <4>;
 191 +       non-removable;
 192 +       mmc-pwrseq = <&wifi_pwrseq>;
 193 +       status = "okay";
 194 +
 195 +       brcmf: wifi@1 {
 196 +               reg = <1>;
 197 +               compatible = "brcm,bcm4329-fmac";
 198 +       };
 199 +};
 200 +
 201 +/* EMMC2 is used to drive the SD card */
 202 +&emmc2 {
 203 +       vqmmc-supply = <&sd_io_1v8_reg>;
 204 +       broken-cd;
 205 +       status = "okay";
 206 +};
 207 +
 208 +&genet {
 209 +       phy-handle = <&phy1>;
 210 +       phy-mode = "rgmii-rxid";
 211 +       status = "okay";
 212 +};
 213 +
 214 +&genet_mdio {
 215 +       phy1: ethernet-phy@1 {
 216 +               /* No PHY interrupt */
 217 +               reg = <0x1>;
 218 +       };
 219 +};
 220 +
 221 +/* uart0 communicates with the BT module */
 222 +&uart0 {
 223 +       pinctrl-names = "default";
 224 +       pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32>;
 225 +       uart-has-rtscts;
 226 +       status = "okay";
 227 +
 228 +       bluetooth {
 229 +               compatible = "brcm,bcm43438-bt";
 230 +               max-speed = <2000000>;
 231 +               shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>;
 232 +       };
 233 +};
 234 +
 235 +/* uart1 is mapped to the pin header */
 236 +&uart1 {
 237 +       pinctrl-names = "default";
 238 +       pinctrl-0 = <&uart1_gpio14>;
 239 +       status = "okay";
 240 +};
 241 +
 242 +&vchiq {
 243 +       interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
 244 +};
 245 +
 246 +// =============================================
 247 +// Downstream rpi- changes
 248 +
 249 +#include "bcm270x.dtsi"
 250 +#include "bcm271x-rpi-bt.dtsi"
 251 +
 252 +/ {
 253 +       soc {
 254 +               /delete-node/ pixelvalve@7e807000;
 255 +               /delete-node/ hdmi@7e902000;
 256 +       };
 257 +};
 258 +
 259 +#include "bcm2711-rpi.dtsi"
 260 +#include "bcm283x-rpi-csi1-2lane.dtsi"
 261 +#include "bcm283x-rpi-i2c0mux_0_44.dtsi"
 262 +
 263 +/ {
 264 +       chosen {
 265 +               bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1 snd_bcm2835.enable_headphones=1";
 266 +       };
 267 +
 268 +       aliases {
 269 +               serial0 = &uart1;
 270 +               serial1 = &uart0;
 271 +               mmc0 = &emmc2;
 272 +               mmc1 = &mmcnr;
 273 +               mmc2 = &sdhost;
 274 +               /delete-property/ i2c2;
 275 +               i2c3 = &i2c3;
 276 +               i2c4 = &i2c4;
 277 +               i2c5 = &i2c5;
 278 +               i2c6 = &i2c6;
 279 +               /delete-property/ intc;
 280 +       };
 281 +
 282 +       /delete-node/ wifi-pwrseq;
 283 +};
 284 +
 285 +&mmcnr {
 286 +       pinctrl-names = "default";
 287 +       pinctrl-0 = <&sdio_pins>;
 288 +       bus-width = <4>;
 289 +       status = "okay";
 290 +};
 291 +
 292 +&uart0 {
 293 +       pinctrl-0 = <&uart0_pins &bt_pins>;
 294 +       status = "okay";
 295 +};
 296 +
 297 +&uart1 {
 298 +       pinctrl-0 = <&uart1_pins>;
 299 +};
 300 +
 301 +&spi0 {
 302 +       pinctrl-names = "default";
 303 +       pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
 304 +       cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
 305 +
 306 +       spidev0: spidev@0{
 307 +               compatible = "spidev";
 308 +               reg = <0>;      /* CE0 */
 309 +               #address-cells = <1>;
 310 +               #size-cells = <0>;
 311 +               spi-max-frequency = <125000000>;
 312 +       };
 313 +
 314 +       spidev1: spidev@1{
 315 +               compatible = "spidev";
 316 +               reg = <1>;      /* CE1 */
 317 +               #address-cells = <1>;
 318 +               #size-cells = <0>;
 319 +               spi-max-frequency = <125000000>;
 320 +       };
 321 +};
 322 +
 323 +&gpio {
 324 +       spi0_pins: spi0_pins {
 325 +               brcm,pins = <9 10 11>;
 326 +               brcm,function = <BCM2835_FSEL_ALT0>;
 327 +       };
 328 +
 329 +       spi0_cs_pins: spi0_cs_pins {
 330 +               brcm,pins = <8 7>;
 331 +               brcm,function = <BCM2835_FSEL_GPIO_OUT>;
 332 +       };
 333 +
 334 +       spi3_pins: spi3_pins {
 335 +               brcm,pins = <1 2 3>;
 336 +               brcm,function = <BCM2835_FSEL_ALT3>;
 337 +       };
 338 +
 339 +       spi3_cs_pins: spi3_cs_pins {
 340 +               brcm,pins = <0 24>;
 341 +               brcm,function = <BCM2835_FSEL_GPIO_OUT>;
 342 +       };
 343 +
 344 +       spi4_pins: spi4_pins {
 345 +               brcm,pins = <5 6 7>;
 346 +               brcm,function = <BCM2835_FSEL_ALT3>;
 347 +       };
 348 +
 349 +       spi4_cs_pins: spi4_cs_pins {
 350 +               brcm,pins = <4 25>;
 351 +               brcm,function = <BCM2835_FSEL_GPIO_OUT>;
 352 +       };
 353 +
 354 +       spi5_pins: spi5_pins {
 355 +               brcm,pins = <13 14 15>;
 356 +               brcm,function = <BCM2835_FSEL_ALT3>;
 357 +       };
 358 +
 359 +       spi5_cs_pins: spi5_cs_pins {
 360 +               brcm,pins = <12 26>;
 361 +               brcm,function = <BCM2835_FSEL_GPIO_OUT>;
 362 +       };
 363 +
 364 +       spi6_pins: spi6_pins {
 365 +               brcm,pins = <19 20 21>;
 366 +               brcm,function = <BCM2835_FSEL_ALT3>;
 367 +       };
 368 +
 369 +       spi6_cs_pins: spi6_cs_pins {
 370 +               brcm,pins = <18 27>;
 371 +               brcm,function = <BCM2835_FSEL_GPIO_OUT>;
 372 +       };
 373 +
 374 +       i2c0_pins: i2c0 {
 375 +               brcm,pins = <0 1>;
 376 +               brcm,function = <BCM2835_FSEL_ALT0>;
 377 +               brcm,pull = <BCM2835_PUD_UP>;
 378 +       };
 379 +
 380 +       i2c1_pins: i2c1 {
 381 +               brcm,pins = <2 3>;
 382 +               brcm,function = <BCM2835_FSEL_ALT0>;
 383 +               brcm,pull = <BCM2835_PUD_UP>;
 384 +       };
 385 +
 386 +       i2c3_pins: i2c3 {
 387 +               brcm,pins = <4 5>;
 388 +               brcm,function = <BCM2835_FSEL_ALT5>;
 389 +               brcm,pull = <BCM2835_PUD_UP>;
 390 +       };
 391 +
 392 +       i2c4_pins: i2c4 {
 393 +               brcm,pins = <8 9>;
 394 +               brcm,function = <BCM2835_FSEL_ALT5>;
 395 +               brcm,pull = <BCM2835_PUD_UP>;
 396 +       };
 397 +
 398 +       i2c5_pins: i2c5 {
 399 +               brcm,pins = <12 13>;
 400 +               brcm,function = <BCM2835_FSEL_ALT5>;
 401 +               brcm,pull = <BCM2835_PUD_UP>;
 402 +       };
 403 +
 404 +       i2c6_pins: i2c6 {
 405 +               brcm,pins = <22 23>;
 406 +               brcm,function = <BCM2835_FSEL_ALT5>;
 407 +               brcm,pull = <BCM2835_PUD_UP>;
 408 +       };
 409 +
 410 +       i2s_pins: i2s {
 411 +               brcm,pins = <18 19 20 21>;
 412 +               brcm,function = <BCM2835_FSEL_ALT0>;
 413 +       };
 414 +
 415 +       sdio_pins: sdio_pins {
 416 +               brcm,pins =     <34 35 36 37 38 39>;
 417 +               brcm,function = <BCM2835_FSEL_ALT3>; // alt3 = SD1
 418 +               brcm,pull =     <0 2 2 2 2 2>;
 419 +       };
 420 +
 421 +       bt_pins: bt_pins {
 422 +               brcm,pins = "-"; // non-empty to keep btuart happy, //4 = 0
 423 +                                // to fool pinctrl
 424 +               brcm,function = <0>;
 425 +               brcm,pull = <2>;
 426 +       };
 427 +
 428 +       uart0_pins: uart0_pins {
 429 +               brcm,pins = <32 33>;
 430 +               brcm,function = <BCM2835_FSEL_ALT3>;
 431 +               brcm,pull = <0 2>;
 432 +       };
 433 +
 434 +       uart1_pins: uart1_pins {
 435 +               brcm,pins;
 436 +               brcm,function;
 437 +               brcm,pull;
 438 +       };
 439 +
 440 +       uart2_pins: uart2_pins {
 441 +               brcm,pins = <0 1>;
 442 +               brcm,function = <BCM2835_FSEL_ALT4>;
 443 +               brcm,pull = <0 2>;
 444 +       };
 445 +
 446 +       uart3_pins: uart3_pins {
 447 +               brcm,pins = <4 5>;
 448 +               brcm,function = <BCM2835_FSEL_ALT4>;
 449 +               brcm,pull = <0 2>;
 450 +       };
 451 +
 452 +       uart4_pins: uart4_pins {
 453 +               brcm,pins = <8 9>;
 454 +               brcm,function = <BCM2835_FSEL_ALT4>;
 455 +               brcm,pull = <0 2>;
 456 +       };
 457 +
 458 +       uart5_pins: uart5_pins {
 459 +               brcm,pins = <12 13>;
 460 +               brcm,function = <BCM2835_FSEL_ALT4>;
 461 +               brcm,pull = <0 2>;
 462 +       };
 463 +};
 464 +
 465 +&i2c0if {
 466 +       clock-frequency = <100000>;
 467 +};
 468 +
 469 +&i2c1 {
 470 +       pinctrl-names = "default";
 471 +       pinctrl-0 = <&i2c1_pins>;
 472 +       clock-frequency = <100000>;
 473 +};
 474 +
 475 +&i2s {
 476 +       pinctrl-names = "default";
 477 +       pinctrl-0 = <&i2s_pins>;
 478 +};
 479 +
 480 +/ {
 481 +       __overrides__ {
 482 +               /delete-property/ i2c2_baudrate;
 483 +               /delete-property/ i2c2_iknowwhatimdoing;
 484 +       };
 485 +};
 486 +
 487 +&firmwarekms {
 488 +       compatible = "raspberrypi,rpi-firmware-kms-2711";
 489 +};
 490 +
 491 +// =============================================
 492 +// Board specific stuff here
 493 +
 494 +/ {
 495 +       sd_vcc_reg: sd_vcc_reg {
 496 +               compatible = "regulator-fixed";
 497 +               regulator-name = "vcc-sd";
 498 +               regulator-min-microvolt = <3300000>;
 499 +               regulator-max-microvolt = <3300000>;
 500 +               regulator-boot-on;
 501 +               enable-active-high;
 502 +               gpio = <&expgpio 6 GPIO_ACTIVE_HIGH>;
 503 +       };
 504 +
 505 +       power_ctrl: power_ctrl {
 506 +               compatible = "gpio-poweroff";
 507 +               gpios = <&expgpio 5 0>;
 508 +               force;
 509 +       };
 510 +};
 511 +
 512 +&sdhost {
 513 +       status = "disabled";
 514 +};
 515 +
 516 +&emmc2 {
 517 +       vmmc-supply = <&sd_vcc_reg>;
 518 +};
 519 +
 520 +&phy1 {
 521 +       led-modes = <0x00 0x08>; /* link/activity link */
 522 +};
 523 +
 524 +&gpio {
 525 +       audio_pins: audio_pins {
 526 +               brcm,pins = <40 41>;
 527 +               brcm,function = <4>;
 528 +       };
 529 +};
 530 +
 531 +&leds {
 532 +       act_led: act {
 533 +               label = "led0";
 534 +               linux,default-trigger = "default-on";
 535 +               default-state = "on";
 536 +               gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
 537 +       };
 538 +
 539 +       pwr_led: pwr {
 540 +               label = "led1";
 541 +               linux,default-trigger = "default-on";
 542 +               gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
 543 +       };
 544 +};
 545 +
 546 +&pwm1 {
 547 +       status = "disabled";
 548 +};
 549 +
 550 +&audio {
 551 +       pinctrl-names = "default";
 552 +       pinctrl-0 = <&audio_pins>;
 553 +       brcm,disable-headphones = <1>;
 554 +};
 555 +
 556 +&vc4 {
 557 +       status = "disabled";
 558 +};
 559 +
 560 +&pixelvalve0 {
 561 +       status = "disabled";
 562 +};
 563 +
 564 +&pixelvalve1 {
 565 +       status = "disabled";
 566 +};
 567 +
 568 +&pixelvalve2 {
 569 +       status = "disabled";
 570 +};
 571 +
 572 +&pixelvalve3 {
 573 +       status = "disabled";
 574 +};
 575 +
 576 +&pixelvalve4 {
 577 +       status = "disabled";
 578 +};
 579 +
 580 +&hdmi0 {
 581 +       status = "disabled";
 582 +};
 583 +
 584 +&ddc0 {
 585 +       status = "disabled";
 586 +};
 587 +
 588 +&hdmi1 {
 589 +       status = "disabled";
 590 +};
 591 +
 592 +&ddc1 {
 593 +       status = "disabled";
 594 +};
 595 +
 596 +/ {
 597 +       __overrides__ {
 598 +               act_led_gpio = <&act_led>,"gpios:4";
 599 +               act_led_activelow = <&act_led>,"gpios:8";
 600 +               act_led_trigger = <&act_led>,"linux,default-trigger";
 601 +
 602 +               pwr_led_gpio = <&pwr_led>,"gpios:4";
 603 +               pwr_led_activelow = <&pwr_led>,"gpios:8";
 604 +               pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
 605 +
 606 +               eth_led0 = <&phy1>,"led-modes:0";
 607 +               eth_led1 = <&phy1>,"led-modes:4";
 608 +
 609 +               sd_poll_once = <&emmc2>, "non-removable?";
 610 +               spi_dma4 = <&spi0>, "dmas:0=", <&dma40>,
 611 +                          <&spi0>, "dmas:8=", <&dma40>;
 612 +       };
 613 +};
 614 --- a/arch/arm64/boot/dts/broadcom/Makefile
 615 +++ b/arch/arm64/boot/dts/broadcom/Makefile
 616 @@ -7,6 +7,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rp
 617  dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rpi-3-b.dtb
 618  dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rpi-3-b-plus.dtb
 619  dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-4-b.dtb
 620 +dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-400.dtb
 621  dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rpi-cm3.dtb
 622  dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-cm4.dtb
 623
 624 --- /dev/null
 625 +++ b/arch/arm64/boot/dts/broadcom/bcm2711-rpi-400.dts
 626 @@ -0,0 +1 @@
 627 +#include "../../../../arm/boot/dts/bcm2711-rpi-400.dts"