bmips: dts: move leds dt-bindings include to SoCs
[openwrt/openwrt.git] / target / linux / bmips / dts / bcm63168-comtrend-vr-3032u.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later
2
3 #include "bcm63268.dtsi"
4
5 / {
6 model = "Comtrend VR-3032u";
7 compatible = "comtrend,vr-3032u", "brcm,bcm63168", "brcm,bcm63268";
8
9 aliases {
10 led-boot = &led_power_green;
11 led-failsafe = &led_power_green;
12 led-running = &led_power_green;
13 led-upgrade = &led_power_green;
14 };
15
16 keys {
17 compatible = "gpio-keys-polled";
18 poll-interval = <100>;
19
20 reset {
21 label = "reset";
22 gpios = <&gpio 32 GPIO_ACTIVE_LOW>;
23 linux,code = <KEY_RESTART>;
24 debounce-interval = <60>;
25 };
26
27 wps {
28 label = "wps";
29 gpios = <&gpio 33 GPIO_ACTIVE_LOW>;
30 linux,code = <KEY_WPS_BUTTON>;
31 debounce-interval = <60>;
32 };
33 };
34 };
35
36 &ehci {
37 status = "okay";
38 };
39
40 &ethernet {
41 status = "okay";
42
43 nvmem-cells = <&macaddr_cferom_6a0>;
44 nvmem-cell-names = "mac-address";
45 };
46
47 &leds {
48 status = "okay";
49
50 brcm,serial-leds;
51 brcm,serial-dat-low;
52 brcm,serial-shift-inv;
53
54 pinctrl-names = "default";
55 pinctrl-0 = <&pinctrl_serial_led>;
56
57 led@0 {
58 /* GPHY0 Spd 0 */
59 reg = <0>;
60 brcm,hardware-controlled;
61 brcm,link-signal-sources = <0>;
62 };
63
64 led@1 {
65 /* GPHY0 Spd 1 */
66 reg = <1>;
67 brcm,hardware-controlled;
68 brcm,link-signal-sources = <1>;
69 };
70
71 led@2 {
72 reg = <2>;
73 active-low;
74 label = "red:internet";
75 };
76
77 led@3 {
78 reg = <3>;
79 active-low;
80 label = "green:dsl";
81 };
82
83 led@4 {
84 reg = <4>;
85 active-low;
86 function = LED_FUNCTION_USB;
87 color = <LED_COLOR_ID_GREEN>;
88 };
89
90 led@7 {
91 reg = <7>;
92 active-low;
93 function = LED_FUNCTION_WPS;
94 color = <LED_COLOR_ID_GREEN>;
95 };
96
97 led@8 {
98 reg = <8>;
99 active-low;
100 label = "green:internet";
101 };
102
103 led@9 {
104 /* EPHY0 Act */
105 reg = <9>;
106 brcm,hardware-controlled;
107 };
108
109 led@10 {
110 /* EPHY1 Act */
111 reg = <10>;
112 brcm,hardware-controlled;
113 };
114
115 led@11 {
116 /* EPHY2 Act */
117 reg = <11>;
118 brcm,hardware-controlled;
119 };
120
121 led@12 {
122 /* GPHY0 Act */
123 reg = <12>;
124 brcm,hardware-controlled;
125 };
126
127 led@13 {
128 /* EPHY0 Spd */
129 reg = <13>;
130 brcm,hardware-controlled;
131 };
132
133 led@14 {
134 /* EPHY1 Spd */
135 reg = <14>;
136 brcm,hardware-controlled;
137 };
138
139 led@15 {
140 /* EPHY2 Spd */
141 reg = <15>;
142 brcm,hardware-controlled;
143 };
144
145 led_power_green: led@20 {
146 reg = <20>;
147 active-low;
148 function = LED_FUNCTION_POWER;
149 color = <LED_COLOR_ID_GREEN>;
150 };
151 };
152
153 &nflash {
154 status = "okay";
155
156 nandcs@0 {
157 compatible = "brcm,nandcs";
158 reg = <0>;
159 nand-ecc-step-size = <512>;
160 nand-ecc-strength = <15>;
161 nand-on-flash-bbt;
162 brcm,nand-oob-sector-size = <64>;
163
164 #address-cells = <1>;
165 #size-cells = <1>;
166
167 partitions {
168 compatible = "fixed-partitions";
169 #address-cells = <1>;
170 #size-cells = <1>;
171
172 partition@0 {
173 label = "cferom";
174 reg = <0x0000000 0x0020000>;
175 read-only;
176
177 nvmem-layout {
178 compatible = "fixed-layout";
179 #address-cells = <1>;
180 #size-cells = <1>;
181
182 macaddr_cferom_6a0: macaddr@6a0 {
183 reg = <0x6a0 0x6>;
184 };
185 };
186 };
187
188 partition@20000 {
189 compatible = "brcm,wfi-split";
190 label = "wfi";
191 reg = <0x0020000 0x7ac0000>;
192 };
193 };
194 };
195 };
196
197 &ohci {
198 status = "okay";
199 };
200
201 &switch0 {
202 ports {
203 port@0 {
204 reg = <0>;
205 label = "lan2";
206
207 phy-handle = <&phy1>;
208 phy-mode = "mii";
209 };
210
211 port@1 {
212 reg = <1>;
213 label = "lan3";
214
215 phy-handle = <&phy2>;
216 phy-mode = "mii";
217 };
218
219 port@2 {
220 reg = <2>;
221 label = "lan4";
222
223 phy-handle = <&phy3>;
224 phy-mode = "mii";
225 };
226
227 port@3 {
228 reg = <3>;
229 label = "lan1";
230
231 phy-handle = <&phy4>;
232 phy-mode = "mii";
233 };
234 };
235 };
236
237 &uart0 {
238 status = "okay";
239 };
240
241 &usbh {
242 status = "okay";
243 };