d2a9973fa8c1f905d4dc7c84480f4a20def0fe6a
[openwrt/openwrt.git] / target / linux / brcm2708 / patches-4.19 / 950-0361-dwc_otg-only-do_split-when-we-actually-need-to-do-a-.patch
1 From 0c988aed71773be4481b886ccf03c40a52f57cdb Mon Sep 17 00:00:00 2001
2 From: P33M <p33m@github.com>
3 Date: Mon, 8 Apr 2019 12:45:23 +0100
4 Subject: [PATCH] dwc_otg: only do_split when we actually need to do a
5 split
6
7 The previous test would fail if the root port was in fullspeed mode
8 and there was a hub between the FS device and the root port. While
9 the transfer worked, the schedule mangling performed for high-speed
10 split transfers would break leading to an 8ms polling interval.
11 ---
12 drivers/usb/host/dwc_otg/dwc_otg_hcd_queue.c | 9 ++++-----
13 1 file changed, 4 insertions(+), 5 deletions(-)
14
15 --- a/drivers/usb/host/dwc_otg/dwc_otg_hcd_queue.c
16 +++ b/drivers/usb/host/dwc_otg/dwc_otg_hcd_queue.c
17 @@ -167,8 +167,10 @@ void qh_init(dwc_otg_hcd_t * hcd, dwc_ot
18 char *speed, *type;
19 int dev_speed;
20 uint32_t hub_addr, hub_port;
21 + hprt0_data_t hprt;
22
23 dwc_memset(qh, 0, sizeof(dwc_otg_qh_t));
24 + hprt.d32 = DWC_READ_REG32(hcd->core_if->host_if->hprt0);
25
26 /* Initialize QH */
27 qh->ep_type = dwc_otg_hcd_get_pipe_type(&urb->pipe_info);
28 @@ -191,9 +193,8 @@ void qh_init(dwc_otg_hcd_t * hcd, dwc_ot
29
30 qh->nak_frame = 0xffff;
31
32 - if (((dev_speed == USB_SPEED_LOW) ||
33 - (dev_speed == USB_SPEED_FULL)) &&
34 - (hub_addr != 0 && hub_addr != 1)) {
35 + if (hprt.b.prtspd == DWC_HPRT0_PRTSPD_HIGH_SPEED &&
36 + dev_speed != USB_SPEED_HIGH) {
37 DWC_DEBUGPL(DBG_HCD,
38 "QH init: EP %d: TT found at hub addr %d, for port %d\n",
39 dwc_otg_hcd_get_ep_num(&urb->pipe_info), hub_addr,
40 @@ -204,7 +205,6 @@ void qh_init(dwc_otg_hcd_t * hcd, dwc_ot
41
42 if (qh->ep_type == UE_INTERRUPT || qh->ep_type == UE_ISOCHRONOUS) {
43 /* Compute scheduling parameters once and save them. */
44 - hprt0_data_t hprt;
45
46 /** @todo Account for split transfers in the bus time. */
47 int bytecount =
48 @@ -219,7 +219,6 @@ void qh_init(dwc_otg_hcd_t * hcd, dwc_ot
49 SCHEDULE_SLOP);
50 qh->interval = urb->interval;
51
52 - hprt.d32 = DWC_READ_REG32(hcd->core_if->host_if->hprt0);
53 if (hprt.b.prtspd == DWC_HPRT0_PRTSPD_HIGH_SPEED) {
54 if (dev_speed == USB_SPEED_LOW ||
55 dev_speed == USB_SPEED_FULL) {