target/linux/brcm2708/patches-4.19/950-0465-hwrng-iproc-rng200-Add-BCM2838-support.patch

   1 From e9c0fd87b6169baf5bd10293a85675d505086191 Mon Sep 17 00:00:00 2001
   2 From: Stefan Wahren <wahrenst@gmx.net>
   3 Date: Sat, 4 May 2019 17:06:15 +0200
   4 Subject: [PATCH] hwrng: iproc-rng200: Add BCM2838 support
   5
   6 The HWRNG on the BCM2838 is compatible to iproc-rng200, so add the
   7 support to this driver instead of bcm2835-rng.
   8
   9 Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
  10 ---
  11  drivers/char/hw_random/Kconfig        |  4 +-
  12  drivers/char/hw_random/iproc-rng200.c | 81 +++++++++++++++++++++++++--
  13  2 files changed, 79 insertions(+), 6 deletions(-)
  14
  15 --- a/drivers/char/hw_random/Kconfig
  16 +++ b/drivers/char/hw_random/Kconfig
  17 @@ -89,11 +89,11 @@ config HW_RANDOM_BCM2835
  18
  19  config HW_RANDOM_IPROC_RNG200
  20         tristate "Broadcom iProc/STB RNG200 support"
  21 -       depends on ARCH_BCM_IPROC || ARCH_BRCMSTB
  22 +       depends on ARCH_BCM_IPROC || ARCH_BCM2835 || ARCH_BRCMSTB
  23         default HW_RANDOM
  24         ---help---
  25           This driver provides kernel-side support for the RNG200
  26 -         hardware found on the Broadcom iProc and STB SoCs.
  27 +         hardware found on the Broadcom iProc, BCM2838 and STB SoCs.
  28
  29           To compile this driver as a module, choose M here: the
  30           module will be called iproc-rng200
  31 --- a/drivers/char/hw_random/iproc-rng200.c
  32 +++ b/drivers/char/hw_random/iproc-rng200.c
  33 @@ -29,6 +29,7 @@
  34  #define RNG_CTRL_RNG_RBGEN_MASK                                0x00001FFF
  35  #define RNG_CTRL_RNG_RBGEN_ENABLE                      0x00000001
  36  #define RNG_CTRL_RNG_RBGEN_DISABLE                     0x00000000
  37 +#define RNG_CTRL_RNG_DIV_CTRL_SHIFT                    13
  38
  39  #define RNG_SOFT_RESET_OFFSET                          0x04
  40  #define RNG_SOFT_RESET                                 0x00000001
  41 @@ -36,16 +37,23 @@
  42  #define RBG_SOFT_RESET_OFFSET                          0x08
  43  #define RBG_SOFT_RESET                                 0x00000001
  44
  45 +#define RNG_TOTAL_BIT_COUNT_OFFSET                     0x0C
  46 +
  47 +#define RNG_TOTAL_BIT_COUNT_THRESHOLD_OFFSET           0x10
  48 +
  49  #define RNG_INT_STATUS_OFFSET                          0x18
  50  #define RNG_INT_STATUS_MASTER_FAIL_LOCKOUT_IRQ_MASK    0x80000000
  51  #define RNG_INT_STATUS_STARTUP_TRANSITIONS_MET_IRQ_MASK        0x00020000
  52  #define RNG_INT_STATUS_NIST_FAIL_IRQ_MASK              0x00000020
  53  #define RNG_INT_STATUS_TOTAL_BITS_COUNT_IRQ_MASK       0x00000001
  54
  55 +#define RNG_INT_ENABLE_OFFSET                          0x1C
  56 +
  57  #define RNG_FIFO_DATA_OFFSET                           0x20
  58
  59  #define RNG_FIFO_COUNT_OFFSET                          0x24
  60  #define RNG_FIFO_COUNT_RNG_FIFO_COUNT_MASK             0x000000FF
  61 +#define RNG_FIFO_COUNT_RNG_FIFO_THRESHOLD_SHIFT                8
  62
  63  struct iproc_rng200_dev {
  64         struct hwrng rng;
  65 @@ -166,6 +174,64 @@ static int iproc_rng200_init(struct hwrn
  66         return 0;
  67  }
  68
  69 +static int bcm2838_rng200_read(struct hwrng *rng, void *buf, size_t max,
  70 +                              bool wait)
  71 +{
  72 +       struct iproc_rng200_dev *priv = to_rng_priv(rng);
  73 +       u32 max_words = max / sizeof(u32);
  74 +       u32 num_words, count, val;
  75 +
  76 +       /* ensure warm up period has elapsed */
  77 +       while (1) {
  78 +               val = ioread32(priv->base + RNG_TOTAL_BIT_COUNT_OFFSET);
  79 +               if (val > 16)
  80 +                       break;
  81 +               cpu_relax();
  82 +       }
  83 +
  84 +       /* ensure fifo is not empty */
  85 +       while (1) {
  86 +               num_words = ioread32(priv->base + RNG_FIFO_COUNT_OFFSET) &
  87 +                           RNG_FIFO_COUNT_RNG_FIFO_COUNT_MASK;
  88 +               if (num_words)
  89 +                       break;
  90 +               if (!wait)
  91 +                       return 0;
  92 +               cpu_relax();
  93 +       }
  94 +
  95 +       if (num_words > max_words)
  96 +               num_words = max_words;
  97 +
  98 +       for (count = 0; count < num_words; count++) {
  99 +               ((u32 *)buf)[count] = ioread32(priv->base +
 100 +                                              RNG_FIFO_DATA_OFFSET);
 101 +       }
 102 +
 103 +       return num_words * sizeof(u32);
 104 +}
 105 +
 106 +static int bcm2838_rng200_init(struct hwrng *rng)
 107 +{
 108 +       struct iproc_rng200_dev *priv = to_rng_priv(rng);
 109 +       uint32_t val;
 110 +
 111 +       if (ioread32(priv->base + RNG_CTRL_OFFSET) & RNG_CTRL_RNG_RBGEN_MASK)
 112 +               return 0;
 113 +
 114 +       /* initial numbers generated are "less random" so will be discarded */
 115 +       val = 0x40000;
 116 +       iowrite32(val, priv->base + RNG_TOTAL_BIT_COUNT_THRESHOLD_OFFSET);
 117 +       /* min fifo count to generate full interrupt */
 118 +       val = 2 << RNG_FIFO_COUNT_RNG_FIFO_THRESHOLD_SHIFT;
 119 +       iowrite32(val, priv->base + RNG_FIFO_COUNT_OFFSET);
 120 +       /* enable the rng - 1Mhz sample rate */
 121 +       val = (0x3 << RNG_CTRL_RNG_DIV_CTRL_SHIFT) | RNG_CTRL_RNG_RBGEN_MASK;
 122 +       iowrite32(val, priv->base + RNG_CTRL_OFFSET);
 123 +
 124 +       return 0;
 125 +}
 126 +
 127  static void iproc_rng200_cleanup(struct hwrng *rng)
 128  {
 129         struct iproc_rng200_dev *priv = to_rng_priv(rng);
 130 @@ -202,10 +268,16 @@ static int iproc_rng200_probe(struct pla
 131                 return PTR_ERR(priv->base);
 132         }
 133
 134 -       priv->rng.name = "iproc-rng200",
 135 -       priv->rng.read = iproc_rng200_read,
 136 -       priv->rng.init = iproc_rng200_init,
 137 -       priv->rng.cleanup = iproc_rng200_cleanup,
 138 +       priv->rng.name = pdev->name;
 139 +       priv->rng.cleanup = iproc_rng200_cleanup;
 140 +
 141 +       if (of_device_is_compatible(dev->of_node, "brcm,bcm2838-rng200")) {
 142 +               priv->rng.init = bcm2838_rng200_init;
 143 +               priv->rng.read = bcm2838_rng200_read;
 144 +       } else {
 145 +               priv->rng.init = iproc_rng200_init;
 146 +               priv->rng.read = iproc_rng200_read;
 147 +       }
 148
 149         /* Register driver */
 150         ret = devm_hwrng_register(dev, &priv->rng);
 151 @@ -222,6 +294,7 @@ static int iproc_rng200_probe(struct pla
 152  static const struct of_device_id iproc_rng200_of_match[] = {
 153         { .compatible = "brcm,bcm7278-rng200", },
 154         { .compatible = "brcm,iproc-rng200", },
 155 +       { .compatible = "brcm,bcm2838-rng200"},
 156         {},
 157  };
 158  MODULE_DEVICE_TABLE(of, iproc_rng200_of_match);