target/linux/generic/backport-5.4/071-v5.16-01-mips-uasm-Add-workaround-for-Loongson-2F-nop-CPU-err.patch

   1 From: Johan Almbladh <johan.almbladh@anyfinetworks.com>
   2 Date: Tue, 5 Oct 2021 18:54:03 +0200
   3 Subject: [PATCH] mips: uasm: Add workaround for Loongson-2F nop CPU errata
   4
   5 This patch implements a workaround for the Loongson-2F nop in generated,
   6 code, if the existing option CONFIG_CPU_NOP_WORKAROUND is set. Before,
   7 the binutils option -mfix-loongson2f-nop was enabled, but no workaround
   8 was done when emitting MIPS code. Now, the nop pseudo instruction is
   9 emitted as "or ax,ax,zero" instead of the default "sll zero,zero,0". This
  10 is consistent with the workaround implemented by binutils.
  11
  12 Link: https://sourceware.org/legacy-ml/binutils/2009-11/msg00387.html
  13
  14 Signed-off-by: Johan Almbladh <johan.almbladh@anyfinetworks.com>
  15 Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
  16 ---
  17
  18 --- a/arch/mips/include/asm/uasm.h
  19 +++ b/arch/mips/include/asm/uasm.h
  20 @@ -249,7 +249,11 @@ static inline void uasm_l##lb(struct uas
  21  #define uasm_i_bnezl(buf, rs, off) uasm_i_bnel(buf, rs, 0, off)
  22  #define uasm_i_ehb(buf) uasm_i_sll(buf, 0, 0, 3)
  23  #define uasm_i_move(buf, a, b) UASM_i_ADDU(buf, a, 0, b)
  24 +#ifdef CONFIG_CPU_NOP_WORKAROUNDS
  25 +#define uasm_i_nop(buf) uasm_i_or(buf, 1, 1, 0)
  26 +#else
  27  #define uasm_i_nop(buf) uasm_i_sll(buf, 0, 0, 0)
  28 +#endif
  29  #define uasm_i_ssnop(buf) uasm_i_sll(buf, 0, 0, 1)
  30
  31  static inline void uasm_i_drotr_safe(u32 **p, unsigned int a1,