kernel: backport a rewrite of the mips eBPF JIT implementation
[openwrt/openwrt.git] / target / linux / generic / backport-5.4 / 810-v5.8-i2c-pxa-move-private-definitions-to-i2c-pxa.c.patch
1 From: Russell King <rmk+kernel@armlinux.org.uk>
2 Bcc: linux@mail.armlinux.org.uk
3 Cc: linux-i2c@vger.kernel.org
4 Subject: [PATCH 08/17] i2c: pxa: move private definitions to i2c-pxa.c
5 MIME-Version: 1.0
6 Content-Disposition: inline
7 Content-Transfer-Encoding: 8bit
8 Content-Type: text/plain; charset="utf-8"
9
10 Move driver-private definitions out of the i2c-pxa.h platform data
11 header file into the driver itself. Nothing outside of the driver
12 makes use of these constants.
13
14 Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
15 ---
16 drivers/i2c/busses/i2c-pxa.c | 43 ++++++++++++++++++++++++
17 include/linux/platform_data/i2c-pxa.h | 48 ---------------------------
18 2 files changed, 43 insertions(+), 48 deletions(-)
19
20 --- a/drivers/i2c/busses/i2c-pxa.c
21 +++ b/drivers/i2c/busses/i2c-pxa.c
22 @@ -86,6 +86,49 @@
23 #define IWCR_HS_CNT2_SHIFT 10
24 #define IWCR_HS_CNT2_MASK (0x1F << IWCR_HS_CNT2_SHIFT)
25
26 +/* need a longer timeout if we're dealing with the fact we may well be
27 + * looking at a multi-master environment
28 + */
29 +#define DEF_TIMEOUT 32
30 +
31 +#define BUS_ERROR (-EREMOTEIO)
32 +#define XFER_NAKED (-ECONNREFUSED)
33 +#define I2C_RETRY (-2000) /* an error has occurred retry transmit */
34 +
35 +/* ICR initialize bit values
36 + *
37 + * 15 FM 0 (100 kHz operation)
38 + * 14 UR 0 (No unit reset)
39 + * 13 SADIE 0 (Disables the unit from interrupting on slave addresses
40 + * matching its slave address)
41 + * 12 ALDIE 0 (Disables the unit from interrupt when it loses arbitration
42 + * in master mode)
43 + * 11 SSDIE 0 (Disables interrupts from a slave stop detected, in slave mode)
44 + * 10 BEIE 1 (Enable interrupts from detected bus errors, no ACK sent)
45 + * 9 IRFIE 1 (Enable interrupts from full buffer received)
46 + * 8 ITEIE 1 (Enables the I2C unit to interrupt when transmit buffer empty)
47 + * 7 GCD 1 (Disables i2c unit response to general call messages as a slave)
48 + * 6 IUE 0 (Disable unit until we change settings)
49 + * 5 SCLE 1 (Enables the i2c clock output for master mode (drives SCL)
50 + * 4 MA 0 (Only send stop with the ICR stop bit)
51 + * 3 TB 0 (We are not transmitting a byte initially)
52 + * 2 ACKNAK 0 (Send an ACK after the unit receives a byte)
53 + * 1 STOP 0 (Do not send a STOP)
54 + * 0 START 0 (Do not send a START)
55 + */
56 +#define I2C_ICR_INIT (ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE)
57 +
58 +/* I2C status register init values
59 + *
60 + * 10 BED 1 (Clear bus error detected)
61 + * 9 SAD 1 (Clear slave address detected)
62 + * 7 IRF 1 (Clear IDBR Receive Full)
63 + * 6 ITE 1 (Clear IDBR Transmit Empty)
64 + * 5 ALD 1 (Clear Arbitration Loss Detected)
65 + * 4 SSD 1 (Clear Slave Stop Detected)
66 + */
67 +#define I2C_ISR_INIT 0x7FF /* status register init */
68 +
69 struct pxa_reg_layout {
70 u32 ibmr;
71 u32 idbr;
72 --- a/include/linux/platform_data/i2c-pxa.h
73 +++ b/include/linux/platform_data/i2c-pxa.h
74 @@ -7,54 +7,6 @@
75 #ifndef _I2C_PXA_H_
76 #define _I2C_PXA_H_
77
78 -#if 0
79 -#define DEF_TIMEOUT 3
80 -#else
81 -/* need a longer timeout if we're dealing with the fact we may well be
82 - * looking at a multi-master environment
83 -*/
84 -#define DEF_TIMEOUT 32
85 -#endif
86 -
87 -#define BUS_ERROR (-EREMOTEIO)
88 -#define XFER_NAKED (-ECONNREFUSED)
89 -#define I2C_RETRY (-2000) /* an error has occurred retry transmit */
90 -
91 -/* ICR initialize bit values
92 -*
93 -* 15. FM 0 (100 Khz operation)
94 -* 14. UR 0 (No unit reset)
95 -* 13. SADIE 0 (Disables the unit from interrupting on slave addresses
96 -* matching its slave address)
97 -* 12. ALDIE 0 (Disables the unit from interrupt when it loses arbitration
98 -* in master mode)
99 -* 11. SSDIE 0 (Disables interrupts from a slave stop detected, in slave mode)
100 -* 10. BEIE 1 (Enable interrupts from detected bus errors, no ACK sent)
101 -* 9. IRFIE 1 (Enable interrupts from full buffer received)
102 -* 8. ITEIE 1 (Enables the I2C unit to interrupt when transmit buffer empty)
103 -* 7. GCD 1 (Disables i2c unit response to general call messages as a slave)
104 -* 6. IUE 0 (Disable unit until we change settings)
105 -* 5. SCLE 1 (Enables the i2c clock output for master mode (drives SCL)
106 -* 4. MA 0 (Only send stop with the ICR stop bit)
107 -* 3. TB 0 (We are not transmitting a byte initially)
108 -* 2. ACKNAK 0 (Send an ACK after the unit receives a byte)
109 -* 1. STOP 0 (Do not send a STOP)
110 -* 0. START 0 (Do not send a START)
111 -*
112 -*/
113 -#define I2C_ICR_INIT (ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE)
114 -
115 -/* I2C status register init values
116 - *
117 - * 10. BED 1 (Clear bus error detected)
118 - * 9. SAD 1 (Clear slave address detected)
119 - * 7. IRF 1 (Clear IDBR Receive Full)
120 - * 6. ITE 1 (Clear IDBR Transmit Empty)
121 - * 5. ALD 1 (Clear Arbitration Loss Detected)
122 - * 4. SSD 1 (Clear Slave Stop Detected)
123 - */
124 -#define I2C_ISR_INIT 0x7FF /* status register init */
125 -
126 struct i2c_slave_client;
127
128 struct i2c_pxa_platform_data {