daab7767692e451d27c3ec12989e04d9c8895e31
[openwrt/openwrt.git] / target / linux / generic / pending-4.19 / 220-optimize_inlining.patch
1 --- a/arch/arm/include/asm/hardirq.h
2 +++ b/arch/arm/include/asm/hardirq.h
3 @@ -6,6 +6,7 @@
4 #include <linux/threads.h>
5 #include <asm/irq.h>
6
7 +/* number of IPIS _not_ including IPI_CPU_BACKTRACE */
8 #define NR_IPI 7
9
10 typedef struct {
11 --- a/arch/arm/kernel/atags.h
12 +++ b/arch/arm/kernel/atags.h
13 @@ -5,7 +5,7 @@ void convert_to_tag_list(struct tag *tag
14 const struct machine_desc *setup_machine_tags(phys_addr_t __atags_pointer,
15 unsigned int machine_nr);
16 #else
17 -static inline const struct machine_desc *
18 +static inline const struct machine_desc * __init __noreturn
19 setup_machine_tags(phys_addr_t __atags_pointer, unsigned int machine_nr)
20 {
21 early_print("no ATAGS support: can't continue\n");
22 --- a/arch/arm/kernel/smp.c
23 +++ b/arch/arm/kernel/smp.c
24 @@ -76,6 +76,10 @@ enum ipi_msg_type {
25 IPI_CPU_STOP,
26 IPI_IRQ_WORK,
27 IPI_COMPLETION,
28 + /*
29 + * CPU_BACKTRACE is special and not included in NR_IPI
30 + * or tracable with trace_ipi_*
31 + */
32 IPI_CPU_BACKTRACE,
33 /*
34 * SGI8-15 can be reserved by secure firmware, and thus may
35 @@ -803,7 +807,7 @@ core_initcall(register_cpufreq_notifier)
36
37 static void raise_nmi(cpumask_t *mask)
38 {
39 - smp_cross_call(mask, IPI_CPU_BACKTRACE);
40 + __smp_cross_call(mask, IPI_CPU_BACKTRACE);
41 }
42
43 void arch_trigger_cpumask_backtrace(const cpumask_t *mask, bool exclude_self)
44 --- a/arch/arm64/include/asm/cpufeature.h
45 +++ b/arch/arm64/include/asm/cpufeature.h
46 @@ -365,7 +365,7 @@ static inline bool cpu_have_feature(unsi
47 }
48
49 /* System capability check for constant caps */
50 -static inline bool __cpus_have_const_cap(int num)
51 +static __always_inline bool __cpus_have_const_cap(int num)
52 {
53 if (num >= ARM64_NCAPS)
54 return false;
55 @@ -379,7 +379,7 @@ static inline bool cpus_have_cap(unsigne
56 return test_bit(num, cpu_hwcaps);
57 }
58
59 -static inline bool cpus_have_const_cap(int num)
60 +static __always_inline bool cpus_have_const_cap(int num)
61 {
62 if (static_branch_likely(&arm64_const_caps_ready))
63 return __cpus_have_const_cap(num);
64 --- a/arch/mips/include/asm/bitops.h
65 +++ b/arch/mips/include/asm/bitops.h
66 @@ -463,7 +463,7 @@ static inline void __clear_bit_unlock(un
67 * Return the bit position (0..63) of the most significant 1 bit in a word
68 * Returns -1 if no 1 bit exists
69 */
70 -static inline unsigned long __fls(unsigned long word)
71 +static __always_inline unsigned long __fls(unsigned long word)
72 {
73 int num;
74
75 @@ -529,7 +529,7 @@ static inline unsigned long __fls(unsign
76 * Returns 0..SZLONG-1
77 * Undefined if no bit exists, so code should check against 0 first.
78 */
79 -static inline unsigned long __ffs(unsigned long word)
80 +static __always_inline unsigned long __ffs(unsigned long word)
81 {
82 return __fls(word & -word);
83 }
84 --- a/arch/mips/kernel/cpu-bugs64.c
85 +++ b/arch/mips/kernel/cpu-bugs64.c
86 @@ -42,8 +42,8 @@ static inline void align_mod(const int a
87 : GCC_IMM_ASM() (align), GCC_IMM_ASM() (mod));
88 }
89
90 -static inline void mult_sh_align_mod(long *v1, long *v2, long *w,
91 - const int align, const int mod)
92 +static __always_inline void mult_sh_align_mod(long *v1, long *v2, long *w,
93 + const int align, const int mod)
94 {
95 unsigned long flags;
96 int m1, m2;
97 --- a/arch/powerpc/kernel/prom_init.c
98 +++ b/arch/powerpc/kernel/prom_init.c
99 @@ -498,14 +498,14 @@ static int __init prom_next_node(phandle
100 }
101 }
102
103 -static inline int prom_getprop(phandle node, const char *pname,
104 - void *value, size_t valuelen)
105 +static inline int __init prom_getprop(phandle node, const char *pname,
106 + void *value, size_t valuelen)
107 {
108 return call_prom("getprop", 4, 1, node, ADDR(pname),
109 (u32)(unsigned long) value, (u32) valuelen);
110 }
111
112 -static inline int prom_getproplen(phandle node, const char *pname)
113 +static inline int __init prom_getproplen(phandle node, const char *pname)
114 {
115 return call_prom("getproplen", 2, 1, node, ADDR(pname));
116 }
117 --- a/arch/powerpc/mm/tlb-radix.c
118 +++ b/arch/powerpc/mm/tlb-radix.c
119 @@ -90,8 +90,8 @@ void radix__tlbiel_all(unsigned int acti
120 asm volatile(PPC_INVALIDATE_ERAT "; isync" : : :"memory");
121 }
122
123 -static inline void __tlbiel_pid(unsigned long pid, int set,
124 - unsigned long ric)
125 +static __always_inline void __tlbiel_pid(unsigned long pid, int set,
126 + unsigned long ric)
127 {
128 unsigned long rb,rs,prs,r;
129
130 @@ -106,7 +106,7 @@ static inline void __tlbiel_pid(unsigned
131 trace_tlbie(0, 1, rb, rs, ric, prs, r);
132 }
133
134 -static inline void __tlbie_pid(unsigned long pid, unsigned long ric)
135 +static __always_inline void __tlbie_pid(unsigned long pid, unsigned long ric)
136 {
137 unsigned long rb,rs,prs,r;
138
139 @@ -136,7 +136,7 @@ static inline void __tlbiel_lpid(unsigne
140 trace_tlbie(lpid, 1, rb, rs, ric, prs, r);
141 }
142
143 -static inline void __tlbie_lpid(unsigned long lpid, unsigned long ric)
144 +static __always_inline void __tlbie_lpid(unsigned long lpid, unsigned long ric)
145 {
146 unsigned long rb,rs,prs,r;
147
148 @@ -239,7 +239,7 @@ static inline void fixup_tlbie_lpid(unsi
149 /*
150 * We use 128 set in radix mode and 256 set in hpt mode.
151 */
152 -static inline void _tlbiel_pid(unsigned long pid, unsigned long ric)
153 +static __always_inline void _tlbiel_pid(unsigned long pid, unsigned long ric)
154 {
155 int set;
156
157 @@ -918,7 +918,7 @@ void radix__tlb_flush(struct mmu_gather
158 tlb->need_flush_all = 0;
159 }
160
161 -static inline void __radix__flush_tlb_range_psize(struct mm_struct *mm,
162 +static __always_inline void __radix__flush_tlb_range_psize(struct mm_struct *mm,
163 unsigned long start, unsigned long end,
164 int psize, bool also_pwc)
165 {
166 --- a/arch/s390/include/asm/cpacf.h
167 +++ b/arch/s390/include/asm/cpacf.h
168 @@ -202,7 +202,7 @@ static inline int __cpacf_check_opcode(u
169 }
170 }
171
172 -static inline int cpacf_query(unsigned int opcode, cpacf_mask_t *mask)
173 +static __always_inline int cpacf_query(unsigned int opcode, cpacf_mask_t *mask)
174 {
175 if (__cpacf_check_opcode(opcode)) {
176 __cpacf_query(opcode, mask);
177 --- a/arch/x86/Kconfig.debug
178 +++ b/arch/x86/Kconfig.debug
179 @@ -276,20 +276,6 @@ config CPA_DEBUG
180 ---help---
181 Do change_page_attr() self-tests every 30 seconds.
182
183 -config OPTIMIZE_INLINING
184 - bool "Allow gcc to uninline functions marked 'inline'"
185 - ---help---
186 - This option determines if the kernel forces gcc to inline the functions
187 - developers have marked 'inline'. Doing so takes away freedom from gcc to
188 - do what it thinks is best, which is desirable for the gcc 3.x series of
189 - compilers. The gcc 4.x series have a rewritten inlining algorithm and
190 - enabling this option will generate a smaller kernel there. Hopefully
191 - this algorithm is so good that allowing gcc 4.x and above to make the
192 - decision will become the default in the future. Until then this option
193 - is there to test gcc for this.
194 -
195 - If unsure, say N.
196 -
197 config DEBUG_ENTRY
198 bool "Debug low-level entry code"
199 depends on DEBUG_KERNEL
200 --- a/drivers/mtd/nand/raw/vf610_nfc.c
201 +++ b/drivers/mtd/nand/raw/vf610_nfc.c
202 @@ -373,7 +373,7 @@ static int vf610_nfc_cmd(struct nand_chi
203 {
204 const struct nand_op_instr *instr;
205 struct vf610_nfc *nfc = chip_to_nfc(chip);
206 - int op_id = -1, trfr_sz = 0, offset;
207 + int op_id = -1, trfr_sz = 0, offset = 0;
208 u32 col = 0, row = 0, cmd1 = 0, cmd2 = 0, code = 0;
209 bool force8bit = false;
210
211 --- a/lib/Kconfig.debug
212 +++ b/lib/Kconfig.debug
213 @@ -309,6 +309,20 @@ config HEADERS_CHECK
214 exported to $(INSTALL_HDR_PATH) (usually 'usr/include' in
215 your build tree), to make sure they're suitable.
216
217 +config OPTIMIZE_INLINING
218 + bool "Allow compiler to uninline functions marked 'inline'"
219 + help
220 + This option determines if the kernel forces gcc to inline the functions
221 + developers have marked 'inline'. Doing so takes away freedom from gcc to
222 + do what it thinks is best, which is desirable for the gcc 3.x series of
223 + compilers. The gcc 4.x series have a rewritten inlining algorithm and
224 + enabling this option will generate a smaller kernel there. Hopefully
225 + this algorithm is so good that allowing gcc 4.x and above to make the
226 + decision will become the default in the future. Until then this option
227 + is there to test gcc for this.
228 +
229 + If unsure, say N.
230 +
231 config DEBUG_SECTION_MISMATCH
232 bool "Enable full Section mismatch analysis"
233 help
234 --- a/arch/x86/Kconfig
235 +++ b/arch/x86/Kconfig
236 @@ -306,9 +306,6 @@ config ZONE_DMA32
237 config AUDIT_ARCH
238 def_bool y if X86_64
239
240 -config ARCH_SUPPORTS_OPTIMIZED_INLINING
241 - def_bool y
242 -
243 config ARCH_SUPPORTS_DEBUG_PAGEALLOC
244 def_bool y
245
246 --- a/include/linux/compiler_types.h
247 +++ b/include/linux/compiler_types.h
248 @@ -268,8 +268,7 @@ struct ftrace_likely_data {
249 * of extern inline functions at link time.
250 * A lot of inline functions can cause havoc with function tracing.
251 */
252 -#if !defined(CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING) || \
253 - !defined(CONFIG_OPTIMIZE_INLINING)
254 +#if !defined(CONFIG_OPTIMIZE_INLINING)
255 #define inline \
256 inline __attribute__((always_inline, unused)) notrace __gnu_inline
257 #else