target/linux/generic/pending-5.10/850-0018-PCI-aardvark-Use-separate-INTA-interrupt-for-emulate.patch

   1 From db305233136f5aa2444a8287a279384e8458c458 Mon Sep 17 00:00:00 2001
   2 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org>
   3 Date: Thu, 1 Apr 2021 20:12:48 +0200
   4 Subject: [PATCH] PCI: aardvark: Use separate INTA interrupt for emulated root
   5  bridge
   6 MIME-Version: 1.0
   7 Content-Type: text/plain; charset=UTF-8
   8 Content-Transfer-Encoding: 8bit
   9
  10 Emulated root bridge currently provides only one Legacy INTA interrupt
  11 which is used for reporting PCIe PME and ERR events and handled by kernel
  12 PCIe PME and AER drivers.
  13
  14 Aardvark HW reports these PME and ERR events separately, so there is no
  15 need to mix real INTA interrupt and emulated INTA interrupt for PCIe PME
  16 and AER drivers.
  17
  18 Register a new advk-RP (as in Root Port) irq chip and a new irq domain
  19 for emulated root bridge and use this new separate irq domain for
  20 providing INTA interrupt from emulated root bridge for PME and ERR events.
  21
  22 The real INTA interrupt from real devices is now separate.
  23
  24 A custom map_irq callback function on PCI host bridge structure is used to
  25 allocate IRQ mapping for emulated root bridge from new irq domain. Original
  26 callback of_irq_parse_and_map_pci() is used for all other devices as before.
  27
  28 Signed-off-by: Pali Rohár <pali@kernel.org>
  29 Signed-off-by: Marek Behún <kabel@kernel.org>
  30 ---
  31  drivers/pci/controller/pci-aardvark.c | 69 ++++++++++++++++++++++++++-
  32  1 file changed, 67 insertions(+), 2 deletions(-)
  33
  34 diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
  35 index 85a632537b70..b6e723c5725c 100644
  36 --- a/drivers/pci/controller/pci-aardvark.c
  37 +++ b/drivers/pci/controller/pci-aardvark.c
  38 @@ -280,6 +280,7 @@ struct advk_pcie {
  39         } wins[OB_WIN_COUNT];
  40         u8 wins_count;
  41         int irq;
  42 +       struct irq_domain *rp_irq_domain;
  43         struct irq_domain *irq_domain;
  44         struct irq_chip irq_chip;
  45         raw_spinlock_t irq_lock;
  46 @@ -1441,6 +1442,44 @@ static void advk_pcie_remove_irq_domain(struct advk_pcie *pcie)
  47         irq_domain_remove(pcie->irq_domain);
  48  }
  49
  50 +static struct irq_chip advk_rp_irq_chip = {
  51 +       .name = "advk-RP",
  52 +};
  53 +
  54 +static int advk_pcie_rp_irq_map(struct irq_domain *h,
  55 +                               unsigned int virq, irq_hw_number_t hwirq)
  56 +{
  57 +       struct advk_pcie *pcie = h->host_data;
  58 +
  59 +       irq_set_chip_and_handler(virq, &advk_rp_irq_chip, handle_simple_irq);
  60 +       irq_set_chip_data(virq, pcie);
  61 +
  62 +       return 0;
  63 +}
  64 +
  65 +static const struct irq_domain_ops advk_pcie_rp_irq_domain_ops = {
  66 +       .map = advk_pcie_rp_irq_map,
  67 +       .xlate = irq_domain_xlate_onecell,
  68 +};
  69 +
  70 +static int advk_pcie_init_rp_irq_domain(struct advk_pcie *pcie)
  71 +{
  72 +       pcie->rp_irq_domain = irq_domain_add_linear(NULL, 1,
  73 +                                                   &advk_pcie_rp_irq_domain_ops,
  74 +                                                   pcie);
  75 +       if (!pcie->rp_irq_domain) {
  76 +               dev_err(&pcie->pdev->dev, "Failed to add Root Port IRQ domain\n");
  77 +               return -ENOMEM;
  78 +       }
  79 +
  80 +       return 0;
  81 +}
  82 +
  83 +static void advk_pcie_remove_rp_irq_domain(struct advk_pcie *pcie)
  84 +{
  85 +       irq_domain_remove(pcie->rp_irq_domain);
  86 +}
  87 +
  88  static void advk_pcie_handle_pme(struct advk_pcie *pcie)
  89  {
  90         u32 requester = advk_readl(pcie, PCIE_MSG_LOG_REG) >> 16;
  91 @@ -1463,7 +1502,7 @@ static void advk_pcie_handle_pme(struct advk_pcie *pcie)
  92                 if (!(le16_to_cpu(pcie->bridge.pcie_conf.rootctl) & PCI_EXP_RTCTL_PMEIE))
  93                         return;
  94
  95 -               virq = irq_find_mapping(pcie->irq_domain, 0);
  96 +               virq = irq_find_mapping(pcie->rp_irq_domain, 0);
  97                 if (generic_handle_irq(virq) == -EINVAL)
  98                         dev_err_ratelimited(&pcie->pdev->dev, "unhandled PME IRQ\n");
  99         }
 100 @@ -1520,7 +1559,7 @@ static void advk_pcie_handle_int(struct advk_pcie *pcie)
 101                  * Aardvark HW returns zero for PCI_ERR_ROOT_AER_IRQ, so use
 102                  * PCIe interrupt 0
 103                  */
 104 -               virq = irq_find_mapping(pcie->irq_domain, 0);
 105 +               virq = irq_find_mapping(pcie->rp_irq_domain, 0);
 106                 if (generic_handle_irq(virq) == -EINVAL)
 107                         dev_err_ratelimited(&pcie->pdev->dev, "unhandled ERR IRQ\n");
 108         }
 109 @@ -1566,6 +1605,21 @@ static void advk_pcie_irq_handler(struct irq_desc *desc)
 110         chained_irq_exit(chip, desc);
 111  }
 112
 113 +static int advk_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 114 +{
 115 +       struct advk_pcie *pcie = dev->bus->sysdata;
 116 +
 117 +       /*
 118 +        * Emulated root bridge has its own emulated irq chip and irq domain.
 119 +        * Argument pin is the INTx pin (1=INTA, 2=INTB, 3=INTC, 4=INTD) and
 120 +        * hwirq for irq_create_mapping() is indexed from zero.
 121 +        */
 122 +       if (pci_is_root_bus(dev->bus))
 123 +               return irq_create_mapping(pcie->rp_irq_domain, pin - 1);
 124 +       else
 125 +               return of_irq_parse_and_map_pci(dev, slot, pin);
 126 +}
 127 +
 128  static void __maybe_unused advk_pcie_disable_phy(struct advk_pcie *pcie)
 129  {
 130         phy_power_off(pcie->phy);
 131 @@ -1769,14 +1823,24 @@ static int advk_pcie_probe(struct platform_device *pdev)
 132                 return ret;
 133         }
 134
 135 +       ret = advk_pcie_init_rp_irq_domain(pcie);
 136 +       if (ret) {
 137 +               dev_err(dev, "Failed to initialize irq\n");
 138 +               advk_pcie_remove_msi_irq_domain(pcie);
 139 +               advk_pcie_remove_irq_domain(pcie);
 140 +               return ret;
 141 +       }
 142 +
 143         irq_set_chained_handler_and_data(pcie->irq, advk_pcie_irq_handler, pcie);
 144
 145         bridge->sysdata = pcie;
 146         bridge->ops = &advk_pcie_ops;
 147 +       bridge->map_irq = advk_pcie_map_irq;
 148
 149         ret = pci_host_probe(bridge);
 150         if (ret < 0) {
 151                 irq_set_chained_handler_and_data(pcie->irq, NULL, NULL);
 152 +               advk_pcie_remove_rp_irq_domain(pcie);
 153                 advk_pcie_remove_msi_irq_domain(pcie);
 154                 advk_pcie_remove_irq_domain(pcie);
 155                 return ret;
 156 @@ -1828,6 +1892,7 @@ static int advk_pcie_remove(struct platform_device *pdev)
 157         irq_set_chained_handler_and_data(pcie->irq, NULL, NULL);
 158
 159         /* Remove IRQ domains */
 160 +       advk_pcie_remove_rp_irq_domain(pcie);
 161         advk_pcie_remove_msi_irq_domain(pcie);
 162         advk_pcie_remove_irq_domain(pcie);
 163
 164 --
 165 2.34.1
 166