target/linux/imx6/patches-4.3/204-net-igb-register-mii_bus-for-SerDes-w-external-phy.patch

   1 From 03855caf93f7332a3f320228ba1a0e7baae8a749 Mon Sep 17 00:00:00 2001
   2 From: Tim Harvey <tharvey@gateworks.com>
   3 Date: Thu, 15 May 2014 12:36:23 -0700
   4 Subject: [PATCH] net: igb: register mii_bus for SerDes w/ external phy
   5
   6 If an i210 is configured for 1000BASE-BX link_mode and has an external phy
   7 specified, then register an mii bus using the external phy address as
   8 a mask.
   9
  10 An i210 hooked to an external standard phy will be configured with a link_mo
  11 of SGMII in which case phy ops will be configured and used internall in the
  12 igb driver for link status. However, in certain cases one might be using a
  13 backplane SerDes connection to something that talks on the mdio bus but is
  14 not a standard phy, such as a switch. In this case by registering an mdio
  15 bus a phy driver can manage the device.
  16
  17 Signed-off-by: Tim Harvey <tharvey@gateworks.com>
  18 ---
  19  drivers/net/ethernet/intel/igb/e1000_82575.c |  15 +++
  20  drivers/net/ethernet/intel/igb/e1000_hw.h    |   7 ++
  21  drivers/net/ethernet/intel/igb/igb_main.c    | 168 ++++++++++++++++++++++++++-
  22  3 files changed, 185 insertions(+), 5 deletions(-)
  23
  24 Index: linux-4.3/drivers/net/ethernet/intel/igb/e1000_82575.c
  25 ===================================================================
  26 --- linux-4.3.orig/drivers/net/ethernet/intel/igb/e1000_82575.c 2015-12-18 10:39:44.935158318 -0800
  27 +++ linux-4.3/drivers/net/ethernet/intel/igb/e1000_82575.c      2015-12-18 10:39:44.943158318 -0800
  28 @@ -612,13 +612,25 @@
  29         switch (link_mode) {
  30         case E1000_CTRL_EXT_LINK_MODE_1000BASE_KX:
  31                 hw->phy.media_type = e1000_media_type_internal_serdes;
  32 +               if (igb_sgmii_uses_mdio_82575(hw)) {
  33 +                       u32 mdicnfg = rd32(E1000_MDICNFG);
  34 +                       mdicnfg &= E1000_MDICNFG_PHY_MASK;
  35 +                       hw->phy.addr = mdicnfg >> E1000_MDICNFG_PHY_SHIFT;
  36 +                       hw_dbg("1000BASE_KX w/ external MDIO device at 0x%x\n",
  37 +                              hw->phy.addr);
  38 +               } else {
  39 +                       hw_dbg("1000BASE_KX");
  40 +               }
  41                 break;
  42         case E1000_CTRL_EXT_LINK_MODE_SGMII:
  43                 /* Get phy control interface type set (MDIO vs. I2C)*/
  44                 if (igb_sgmii_uses_mdio_82575(hw)) {
  45                         hw->phy.media_type = e1000_media_type_copper;
  46                         dev_spec->sgmii_active = true;
  47 +                       hw_dbg("SGMII with external MDIO PHY");
  48                         break;
  49 +               } else {
  50 +                       hw_dbg("SGMII with external I2C PHY");
  51                 }
  52                 /* fall through for I2C based SGMII */
  53         case E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES:
  54 @@ -635,8 +647,11 @@
  55                                 hw->phy.media_type = e1000_media_type_copper;
  56                                 dev_spec->sgmii_active = true;
  57                         }
  58 +                       hw_dbg("SERDES with external SFP");
  59
  60                         break;
  61 +               } else {
  62 +                       hw_dbg("SERDES");
  63                 }
  64
  65                 /* do not change link mode for 100BaseFX */
  66 Index: linux-4.3/drivers/net/ethernet/intel/igb/e1000_hw.h
  67 ===================================================================
  68 --- linux-4.3.orig/drivers/net/ethernet/intel/igb/e1000_hw.h    2015-11-01 16:05:25.000000000 -0800
  69 +++ linux-4.3/drivers/net/ethernet/intel/igb/e1000_hw.h 2015-12-18 10:39:44.943158318 -0800
  70 @@ -27,6 +27,7 @@
  71  #include <linux/delay.h>
  72  #include <linux/io.h>
  73  #include <linux/netdevice.h>
  74 +#include <linux/phy.h>
  75
  76  #include "e1000_regs.h"
  77  #include "e1000_defines.h"
  78 @@ -543,6 +544,12 @@
  79         struct e1000_mbx_info mbx;
  80         struct e1000_host_mng_dhcp_cookie mng_cookie;
  81
  82 +#ifdef CONFIG_PHYLIB
  83 +       /* Phylib and MDIO interface */
  84 +       struct mii_bus *mii_bus;
  85 +       struct phy_device *phy_dev;
  86 +       phy_interface_t phy_interface;
  87 +#endif
  88         union {
  89                 struct e1000_dev_spec_82575     _82575;
  90         } dev_spec;
  91 Index: linux-4.3/drivers/net/ethernet/intel/igb/igb_main.c
  92 ===================================================================
  93 --- linux-4.3.orig/drivers/net/ethernet/intel/igb/igb_main.c    2015-12-18 10:39:44.407158315 -0800
  94 +++ linux-4.3/drivers/net/ethernet/intel/igb/igb_main.c 2015-12-18 10:39:44.943158318 -0800
  95 @@ -41,6 +41,7 @@
  96  #include <linux/if_vlan.h>
  97  #include <linux/pci.h>
  98  #include <linux/pci-aspm.h>
  99 +#include <linux/phy.h>
 100  #include <linux/delay.h>
 101  #include <linux/interrupt.h>
 102  #include <linux/ip.h>
 103 @@ -2223,6 +2224,126 @@
 104         return status;
 105  }
 106
 107 +
 108 +#ifdef CONFIG_PHYLIB
 109 +/*
 110 + * MMIO/PHYdev support
 111 + */
 112 +
 113 +static int igb_enet_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
 114 +{
 115 +       struct e1000_hw *hw = bus->priv;
 116 +       u16 out;
 117 +       int err;
 118 +
 119 +       err = igb_read_reg_gs40g(hw, mii_id, regnum, &out);
 120 +       if (err)
 121 +               return err;
 122 +       return out;
 123 +}
 124 +
 125 +static int igb_enet_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
 126 +                               u16 val)
 127 +{
 128 +       struct e1000_hw *hw = bus->priv;
 129 +
 130 +       return igb_write_reg_gs40g(hw, mii_id, regnum, val);
 131 +}
 132 +
 133 +static int igb_enet_mdio_reset(struct mii_bus *bus)
 134 +{
 135 +       udelay(300);
 136 +       return 0;
 137 +}
 138 +
 139 +static void igb_enet_mii_link(struct net_device *netdev)
 140 +{
 141 +}
 142 +
 143 +/* Probe the mdio bus for phys and connect them */
 144 +static int igb_enet_mii_probe(struct net_device *netdev)
 145 +{
 146 +       struct igb_adapter *adapter = netdev_priv(netdev);
 147 +       struct e1000_hw *hw = &adapter->hw;
 148 +       struct phy_device *phy_dev = NULL;
 149 +       int phy_id;
 150 +
 151 +       /* check for attached phy */
 152 +       for (phy_id = 0; (phy_id < PHY_MAX_ADDR); phy_id++) {
 153 +               if (hw->mii_bus->phy_map[phy_id]) {
 154 +                       phy_dev = hw->mii_bus->phy_map[phy_id];
 155 +                       break;
 156 +               }
 157 +       }
 158 +       if (!phy_dev) {
 159 +               netdev_err(netdev, "no PHY found\n");
 160 +               return -ENODEV;
 161 +       }
 162 +
 163 +       hw->phy_interface = PHY_INTERFACE_MODE_RGMII;
 164 +       phy_dev = phy_connect(netdev, dev_name(&phy_dev->dev),
 165 +                             igb_enet_mii_link, hw->phy_interface);
 166 +       if (IS_ERR(phy_dev)) {
 167 +               netdev_err(netdev, "could not attach to PHY\n");
 168 +               return PTR_ERR(phy_dev);
 169 +       }
 170 +
 171 +       hw->phy_dev = phy_dev;
 172 +       netdev_info(netdev, "igb PHY driver [%s] (mii_bus:phy_addr=%s)\n",
 173 +               hw->phy_dev->drv->name, dev_name(&hw->phy_dev->dev));
 174 +
 175 +       return 0;
 176 +}
 177 +
 178 +/* Create and register mdio bus */
 179 +static int igb_enet_mii_init(struct pci_dev *pdev)
 180 +{
 181 +       struct mii_bus *mii_bus;
 182 +       struct net_device *netdev = pci_get_drvdata(pdev);
 183 +       struct igb_adapter *adapter = netdev_priv(netdev);
 184 +       struct e1000_hw *hw = &adapter->hw;
 185 +       int err;
 186 +
 187 +       mii_bus = mdiobus_alloc();
 188 +       if (mii_bus == NULL) {
 189 +               err = -ENOMEM;
 190 +               goto err_out;
 191 +       }
 192 +
 193 +       mii_bus->name = "igb_enet_mii_bus";
 194 +       mii_bus->read = igb_enet_mdio_read;
 195 +       mii_bus->write = igb_enet_mdio_write;
 196 +       mii_bus->reset = igb_enet_mdio_reset;
 197 +       snprintf(mii_bus->id, MII_BUS_ID_SIZE, "%s-%x",
 198 +                pci_name(pdev), hw->device_id + 1);
 199 +       mii_bus->priv = hw;
 200 +       mii_bus->parent = &pdev->dev;
 201 +       mii_bus->phy_mask = ~(1 << hw->phy.addr);
 202 +
 203 +       err = mdiobus_register(mii_bus);
 204 +       if (err) {
 205 +               printk(KERN_ERR "failed to register mii_bus: %d\n", err);
 206 +               goto err_out_free_mdiobus;
 207 +       }
 208 +       hw->mii_bus = mii_bus;
 209 +
 210 +       return 0;
 211 +
 212 +err_out_free_mdiobus:
 213 +       mdiobus_free(mii_bus);
 214 +err_out:
 215 +       return err;
 216 +}
 217 +
 218 +static void igb_enet_mii_remove(struct e1000_hw *hw)
 219 +{
 220 +       if (hw->mii_bus) {
 221 +               mdiobus_unregister(hw->mii_bus);
 222 +               mdiobus_free(hw->mii_bus);
 223 +       }
 224 +}
 225 +#endif /* CONFIG_PHYLIB */
 226 +
 227  /**
 228   *  igb_probe - Device Initialization Routine
 229   *  @pdev: PCI device information struct
 230 @@ -2645,6 +2766,13 @@
 231                 }
 232         }
 233         pm_runtime_put_noidle(&pdev->dev);
 234 +
 235 +#ifdef CONFIG_PHYLIB
 236 +       /* create and register the mdio bus if using ext phy */
 237 +       if (rd32(E1000_MDICNFG) & E1000_MDICNFG_EXT_MDIO)
 238 +               igb_enet_mii_init(pdev);
 239 +#endif
 240 +
 241         return 0;
 242
 243  err_register:
 244 @@ -2792,6 +2920,10 @@
 245         struct e1000_hw *hw = &adapter->hw;
 246
 247         pm_runtime_get_noresume(&pdev->dev);
 248 +#ifdef CONFIG_PHYLIB
 249 +       if (rd32(E1000_MDICNFG) & E1000_MDICNFG_EXT_MDIO)
 250 +               igb_enet_mii_remove(hw);
 251 +#endif
 252  #ifdef CONFIG_IGB_HWMON
 253         igb_sysfs_exit(adapter);
 254  #endif
 255 @@ -3105,6 +3237,12 @@
 256         if (!resuming)
 257                 pm_runtime_put(&pdev->dev);
 258
 259 +#ifdef CONFIG_PHYLIB
 260 +       /* Probe and connect to PHY if using ext phy */
 261 +       if (rd32(E1000_MDICNFG) & E1000_MDICNFG_EXT_MDIO)
 262 +               igb_enet_mii_probe(netdev);
 263 +#endif
 264 +
 265         /* start the watchdog. */
 266         hw->mac.get_link_status = 1;
 267         schedule_work(&adapter->watchdog_task);
 268 @@ -7090,21 +7228,41 @@
 269  static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
 270  {
 271         struct igb_adapter *adapter = netdev_priv(netdev);
 272 +       struct e1000_hw *hw = &adapter->hw;
 273         struct mii_ioctl_data *data = if_mii(ifr);
 274
 275 -       if (adapter->hw.phy.media_type != e1000_media_type_copper)
 276 +       if (adapter->hw.phy.media_type != e1000_media_type_copper &&
 277 +           !(rd32(E1000_MDICNFG) & E1000_MDICNFG_EXT_MDIO))
 278                 return -EOPNOTSUPP;
 279
 280         switch (cmd) {
 281         case SIOCGMIIPHY:
 282 -               data->phy_id = adapter->hw.phy.addr;
 283 +               data->phy_id = hw->phy.addr;
 284                 break;
 285         case SIOCGMIIREG:
 286 -               if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
 287 -                                    &data->val_out))
 288 -                       return -EIO;
 289 +               if (hw->mac.type == e1000_i210 || hw->mac.type == e1000_i211) {
 290 +                       if (igb_read_reg_gs40g(&adapter->hw, data->phy_id,
 291 +                                              data->reg_num & 0x1F,
 292 +                                              &data->val_out))
 293 +                               return -EIO;
 294 +               } else {
 295 +                       if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
 296 +                                            &data->val_out))
 297 +                               return -EIO;
 298 +               }
 299                 break;
 300         case SIOCSMIIREG:
 301 +               if (hw->mac.type == e1000_i210 || hw->mac.type == e1000_i211) {
 302 +                       if (igb_write_reg_gs40g(hw, data->phy_id,
 303 +                                               data->reg_num & 0x1F,
 304 +                                               data->val_in))
 305 +                               return -EIO;
 306 +               } else {
 307 +                       if (igb_write_phy_reg(hw, data->reg_num & 0x1F,
 308 +                                             data->val_in))
 309 +                               return -EIO;
 310 +               }
 311 +               break;
 312         default:
 313                 return -EOPNOTSUPP;
 314         }