target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "qcom-ipq4019.dtsi"
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/input/input.h>
   6 #include <dt-bindings/soc/qcom,tcsr.h>
   7
   8 / {
   9         model = "ALFA Network AP120C-AC";
  10         compatible = "alfa-network,ap120c-ac", "qcom,ipq4019";
  11
  12         aliases {
  13                 led-boot = &status;
  14                 led-failsafe = &status;
  15                 led-running = &status;
  16                 led-upgrade = &status;
  17         };
  18
  19         keys {
  20                 compatible = "gpio-keys";
  21
  22                 reset {
  23                         label = "reset";
  24                         gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
  25                         linux,code = <KEY_RESTART>;
  26                 };
  27         };
  28
  29         leds {
  30                 compatible = "gpio-leds";
  31
  32                 status: status {
  33                         label = "ap120c-ac:blue:status";
  34                         gpios = <&tlmm 5 GPIO_ACTIVE_LOW>;
  35                         default-state = "keep";
  36                 };
  37
  38                 wan {
  39                         label = "ap120c-ac:amber:wan";
  40                         gpios = <&qca8075 19 GPIO_ACTIVE_HIGH>;
  41                 };
  42
  43                 wlan2g {
  44                         label = "ap120c-ac:green:wlan2g";
  45                         gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
  46                         linux,default-trigger = "phy0tpt";
  47                 };
  48
  49                 wlan5g {
  50                         label = "ap120c-ac:red:wlan5g";
  51                         gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
  52                         linux,default-trigger = "phy1tpt";
  53                 };
  54         };
  55
  56         soc {
  57                 mdio@90000 {
  58                         status = "okay";
  59
  60                         pinctrl-0 = <&mdio_pins>;
  61                         pinctrl-names = "default";
  62                 };
  63
  64                 ess-psgmii@98000 {
  65                         status = "okay";
  66                 };
  67
  68                 counter@4a1000 {
  69                         compatible = "qcom,qca-gcnt";
  70                         reg = <0x4a1000 0x4>;
  71                 };
  72
  73                 tcsr@1949000 {
  74                         compatible = "qcom,tcsr";
  75                         reg = <0x1949000 0x100>;
  76                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  77                 };
  78
  79                 tcsr@194b000 {
  80                         compatible = "qcom,tcsr";
  81                         reg = <0x194b000 0x100>;
  82                         qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  83                 };
  84
  85                 ess_tcsr@1953000 {
  86                         compatible = "qcom,tcsr";
  87                         reg = <0x1953000 0x1000>;
  88                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  89                 };
  90
  91                 tcsr@1957000 {
  92                         compatible = "qcom,tcsr";
  93                         reg = <0x1957000 0x100>;
  94                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  95                 };
  96
  97                 usb2@60f8800 {
  98                         status = "okay";
  99                 };
 100
 101                 usb3@8af8800 {
 102                         status = "okay";
 103
 104                         dwc3@8a00000 {
 105                                 phys = <&usb3_hs_phy>;
 106                                 phy-names = "usb2-phy";
 107                         };
 108                 };
 109
 110                 crypto@8e3a000 {
 111                         status = "okay";
 112                 };
 113
 114                 watchdog@b017000 {
 115                         status = "okay";
 116                 };
 117
 118                 qca8075: ess-switch@c000000 {
 119                         status = "okay";
 120
 121                         switch_lan_bmp = <0x10>;
 122                         switch_wan_bmp = <0x20>;
 123
 124                         #gpio-cells = <2>;
 125                         gpio-controller;
 126                 };
 127
 128                 edma@c080000 {
 129                         status = "okay";
 130                 };
 131         };
 132 };
 133
 134 &blsp_dma {
 135         status = "okay";
 136 };
 137
 138 &blsp1_i2c3 {
 139         status = "okay";
 140
 141         pinctrl-0 = <&i2c0_pins>;
 142         pinctrl-names = "default";
 143
 144         tpm@29 {
 145                 compatible = "atmel,at97sc3204t";
 146                 reg = <0x29>;
 147         };
 148 };
 149
 150 &blsp1_spi1 {
 151         status = "okay";
 152
 153         pinctrl-0 = <&spi0_pins>;
 154         pinctrl-names = "default";
 155         cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>,
 156                    <&tlmm  4 GPIO_ACTIVE_HIGH>;
 157
 158         flash@0 {
 159                 compatible = "jedec,spi-nor";
 160                 reg = <0>;
 161                 spi-max-frequency = <24000000>;
 162
 163                 partitions {
 164                         compatible = "fixed-partitions";
 165                         #address-cells = <1>;
 166                         #size-cells = <1>;
 167
 168                         partition@0 {
 169                                 label = "SBL1";
 170                                 reg = <0x00000000 0x00040000>;
 171                                 read-only;
 172                         };
 173
 174                         partition@40000 {
 175                                 label = "MIBIB";
 176                                 reg = <0x00040000 0x00020000>;
 177                                 read-only;
 178                         };
 179
 180                         partition@60000 {
 181                                 label = "QSEE";
 182                                 reg = <0x00060000 0x00060000>;
 183                                 read-only;
 184                         };
 185
 186                         partition@c0000 {
 187                                 label = "CDT";
 188                                 reg = <0x000c0000 0x00010000>;
 189                                 read-only;
 190                         };
 191
 192                         partition@d0000 {
 193                                 label = "DDRPARAMS";
 194                                 reg = <0x000d0000 0x00010000>;
 195                                 read-only;
 196                         };
 197
 198                         partition@e0000 {
 199                                 label = "APPSBLENV";
 200                                 reg = <0x000e0000 0x00010000>;
 201                         };
 202
 203                         partition@f0000 {
 204                                 label = "APPSBL";
 205                                 reg = <0x000f0000 0x00080000>;
 206                                 read-only;
 207                         };
 208
 209                         partition@170000 {
 210                                 label = "ART";
 211                                 reg = <0x00170000 0x00010000>;
 212                                 read-only;
 213                         };
 214
 215                         partition@180000 {
 216                                 label = "priv_data1";
 217                                 reg = <0x00180000 0x00010000>;
 218                                 read-only;
 219                         };
 220
 221                         partition@190000 {
 222                                 label = "priv_data2";
 223                                 reg = <0x00190000 0x00010000>;
 224                                 read-only;
 225                         };
 226                 };
 227         };
 228
 229         nand@1 {
 230                 compatible = "spinand,mt29f";
 231                 reg = <1>;
 232                 spi-max-frequency = <24000000>;
 233
 234                 partitions {
 235                         compatible = "fixed-partitions";
 236                         #address-cells = <1>;
 237                         #size-cells = <1>;
 238
 239                         partition@0 {
 240                                 label = "rootfs1";
 241                                 reg = <0x00000000 0x04000000>;
 242                         };
 243
 244                         partition@4000000 {
 245                                 label = "rootfs2";
 246                                 reg = <0x04000000 0x04000000>;
 247                         };
 248                 };
 249         };
 250 };
 251
 252 &blsp1_uart1 {
 253         status = "okay";
 254
 255         pinctrl-0 = <&serial0_pins>;
 256         pinctrl-names = "default";
 257 };
 258
 259 &cryptobam {
 260         status = "okay";
 261 };
 262
 263 &gmac0 {
 264         qcom,forced_duplex = <1>;
 265         qcom,forced_speed = <1000>;
 266         qcom,phy_mdio_addr = <3>;
 267         qcom,poll_required = <1>;
 268         vlan_tag = <1 0x10>;
 269 };
 270
 271 &gmac1 {
 272         qcom,forced_duplex = <1>;
 273         qcom,forced_speed = <1000>;
 274         qcom,phy_mdio_addr = <4>;
 275         qcom,poll_required = <1>;
 276         vlan_tag = <2 0x20>;
 277 };
 278
 279 &tlmm {
 280         i2c0_pins: i2c0_pinmux {
 281                 mux_i2c {
 282                         function = "blsp_i2c0";
 283                         pins = "gpio58", "gpio59";
 284                         drive-strength = <16>;
 285                         bias-disable;
 286                 };
 287         };
 288
 289         mdio_pins: mdio_pinmux {
 290                 mux_mdio {
 291                         pins = "gpio53";
 292                         function = "mdio";
 293                         bias-pull-up;
 294                 };
 295
 296                 mux_mdc {
 297                         pins = "gpio52";
 298                         function = "mdc";
 299                         bias-pull-up;
 300                 };
 301         };
 302
 303         serial0_pins: serial0_pinmux {
 304                 mux_uart {
 305                         pins = "gpio60", "gpio61";
 306                         function = "blsp_uart0";
 307                         bias-disable;
 308                 };
 309         };
 310
 311         spi0_pins: spi0_pinmux {
 312                 mux_spi {
 313                         function = "blsp_spi0";
 314                         pins = "gpio55", "gpio56", "gpio57";
 315                         drive-strength = <12>;
 316                         bias-disable;
 317                 };
 318
 319                 mux_cs {
 320                         function = "gpio";
 321                         pins = "gpio54", "gpio4";
 322                         drive-strength = <2>;
 323                         bias-disable;
 324                         output-high;
 325                 };
 326         };
 327 };
 328
 329 &usb2_hs_phy {
 330         status = "okay";
 331 };
 332
 333 &usb3_hs_phy {
 334         status = "okay";
 335 };
 336
 337 &wifi0 {
 338         status = "okay";
 339 };
 340
 341 &wifi1 {
 342         status = "okay";
 343 };