ipq40xx: switch default to 6.6
[openwrt/openwrt.git] / target / linux / ipq40xx / files-6.1 / arch / arm / boot / dts / qcom-ipq4018-whw01.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "qcom-ipq4019.dtsi"
4 #include <dt-bindings/leds/common.h>
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 model = "Linksys WHW01";
10 compatible = "linksys,whw01";
11
12 aliases {
13 serial0 = &blsp1_uart1;
14 led-boot = &led_system_blue;
15 led-running = &led_system_blue;
16 };
17
18 chosen {
19 stdout-path = "serial0:115200n8";
20 bootargs-append = " root=/dev/ubiblock0_0";
21 };
22
23 soc {
24 keys {
25 compatible = "gpio-keys";
26
27 reset {
28 label = "reset";
29 gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
30 linux,code = <KEY_RESTART>;
31 };
32 };
33
34 ess_tcsr@1953000 {
35 status = "okay";
36 };
37 };
38 };
39
40 &blsp_dma {
41 status = "okay";
42 };
43
44 &blsp1_i2c3 {
45 status = "okay";
46 pinctrl-0 = <&i2c_0_pins>;
47 pinctrl-1 = <&i2c_0_pins>;
48 pinctrl-names = "i2c_active", "i2c_sleep";
49
50 leds@62 {
51 compatible = "nxp,pca9633";
52 #address-cells = <1>;
53 #size-cells = <0>;
54 reg = <0x62>;
55
56 /* RGB? */
57 led@0 {
58 reg = <0>;
59 color = <LED_COLOR_ID_RED>;
60 function = LED_FUNCTION_POWER;
61 };
62
63 led@1 {
64 reg = <1>;
65 color = <LED_COLOR_ID_GREEN>;
66 function = LED_FUNCTION_POWER;
67 };
68
69 led_system_blue: led@2 {
70 reg = <2>;
71 color = <LED_COLOR_ID_BLUE>;
72 function = LED_FUNCTION_POWER;
73 linux,default-trigger = "default-on";
74 };
75 };
76 };
77
78 &blsp1_spi1 {
79 status = "okay";
80 pinctrl-0 = <&spi_0_pins>;
81 pinctrl-names = "default";
82 cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 4 GPIO_ACTIVE_HIGH>;
83
84 nor@0 {
85 reg = <0>;
86 compatible = "jedec,spi-nor";
87 spi-max-frequency = <24000000>;
88
89 partitions {
90 compatible = "fixed-partitions";
91 #address-cells = <1>;
92 #size-cells = <1>;
93
94 partition@0 {
95 label = "0:SBL1";
96 reg = <0x0 0x40000>;
97 read-only;
98 };
99
100 partition@40000 {
101 label = "0:MIBIB";
102 reg = <0x40000 0x20000>;
103 read-only;
104 };
105
106 partition@60000 {
107 label = "0:QSEE";
108 reg = <0x60000 0x60000>;
109 read-only;
110 };
111
112 partition@c0000 {
113 label = "0:CDT";
114 reg = <0xc0000 0x10000>;
115 read-only;
116 };
117
118 partition@d0000 {
119 label = "APPSBL";
120 reg = <0xd0000 0xa0000>;
121 read-only;
122 };
123
124 partition@170000 {
125 label = "0:ART";
126 reg = <0x170000 0x10000>;
127 read-only;
128
129 nvmem-layout {
130 compatible = "fixed-layout";
131 #address-cells = <1>;
132 #size-cells = <1>;
133
134 precal_art_1000: precal@1000 {
135 reg = <0x1000 0x2f20>;
136 };
137
138 precal_art_5000: precal@5000 {
139 reg = <0x5000 0x2f20>;
140 };
141 };
142 };
143
144 partition@180000 {
145 label = "u_env";
146 reg = <0x180000 0x40000>;
147 };
148
149 partition@1c0000 {
150 label = "s_env";
151 reg = <0x1c0000 0x20000>;
152 };
153
154 partition@1e0000 {
155 label = "devinfo";
156 reg = <0x1e0000 0x20000>;
157 read-only;
158 };
159 };
160 };
161
162 nand@1 {
163 reg = <1>;
164 compatible = "spi-nand";
165 spi-max-frequency = <24000000>;
166
167 partitions {
168 compatible = "fixed-partitions";
169 #address-cells = <1>;
170 #size-cells = <1>;
171
172 partition@0 {
173 label = "kernel";
174 reg = <0x0000000 0x5000000>;
175 };
176
177 partition@600000 {
178 label = "rootfs";
179 reg = <0x0600000 0x4a00000>;
180 };
181
182 partition@5000000 {
183 label = "alt_kernel";
184 reg = <0x5000000 0x5000000>;
185 };
186
187 partition@5600000 {
188 label = "alt_rootfs";
189 reg = <0x5600000 0x4a00000>;
190 };
191
192 partition@a000000 {
193 label = "sysdiag";
194 reg = <0xa000000 0x0200000>;
195 read-only;
196 };
197
198 partition@a200000 {
199 label = "syscfg";
200 reg = <0xa200000 0x5e00000>;
201 read-only;
202 };
203 };
204 };
205 };
206
207 &blsp1_uart1 {
208 pinctrl-0 = <&serial_pins>;
209 pinctrl-names = "default";
210 status = "okay";
211 };
212
213 &mdio {
214 status = "okay";
215 pinctrl-0 = <&mdio_pins>;
216 pinctrl-names = "default";
217 phy-reset-gpio = <&tlmm 62 GPIO_ACTIVE_HIGH>;
218 };
219
220 &tlmm {
221 mdio_pins: mdio_pinmux {
222 mux_mdio {
223 pins = "gpio53";
224 function = "mdio";
225 bias-pull-up;
226 };
227
228 mux_mdc {
229 pins = "gpio52";
230 function = "mdc";
231 bias-pull-up;
232 };
233 };
234
235 serial_pins: serial_pinmux {
236 mux {
237 pins = "gpio60", "gpio61";
238 function = "blsp_uart0";
239 bias-disable;
240 };
241 };
242
243 spi_0_pins: spi_0_pinmux {
244 pinmux {
245 function = "blsp_spi0";
246 pins = "gpio55", "gpio56", "gpio57";
247 };
248
249 pinmux_cs {
250 function = "gpio";
251 pins = "gpio54", "gpio4";
252 };
253
254 pinconf {
255 pins = "gpio55", "gpio56", "gpio57";
256 drive-strength = <12>;
257 bias-disable;
258 };
259
260 pinconf_cs {
261 pins = "gpio54", "gpio4";
262 drive-strength = <2>;
263 bias-disable;
264 output-high;
265 };
266 };
267
268 i2c_0_pins: i2c_0_pinmux {
269 mux {
270 function = "blsp_i2c0";
271 pins = "gpio58", "gpio59";
272 bias-disable;
273 };
274 };
275
276 reset_pinmux {
277 mux {
278 pins = "gpio63";
279 bias-pull-up;
280 };
281 };
282 };
283
284 &usb2 {
285 status = "okay";
286 };
287
288 &usb2_hs_phy {
289 status = "okay";
290 };
291
292 &usb3 {
293 status = "okay";
294 };
295
296 &usb3_hs_phy {
297 status = "okay";
298 };
299
300 &usb3_ss_phy {
301 status = "okay";
302 };
303
304 &watchdog {
305 status = "okay";
306 };
307
308 &wifi0 {
309 status = "okay";
310 qcom,ath10k-calibration-variant = "linksys-whw01-v1";
311 nvmem-cell-names = "pre-calibration";
312 nvmem-cells = <&precal_art_1000>;
313 };
314
315 &wifi1 {
316 status = "okay";
317 qcom,ath10k-calibration-variant = "linksys-whw01-v1";
318 nvmem-cell-names = "pre-calibration";
319 nvmem-cells = <&precal_art_5000>;
320 };
321
322 &gmac {
323 status = "okay";
324 };
325
326 &switch {
327 status = "okay";
328 };
329
330 &swport4 {
331 status = "okay";
332 label = "eth1";
333 };
334
335 &swport5 {
336 status = "okay";
337 label = "eth2";
338 };