ipq40xx: switch default to 6.6
[openwrt/openwrt.git] / target / linux / ipq40xx / files-6.1 / arch / arm / boot / dts / qcom-ipq4019-mf282plus.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 // Copyright (c) 2022, Pawel Dembicki <paweldembicki@gmail.com>.
3 // Copyright (c) 2023, Andreas Böhler <dev@aboehler.at>
4
5 #include "qcom-ipq4019.dtsi"
6 #include <dt-bindings/soc/qcom,tcsr.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/leds/common.h>
10
11 / {
12 model = "ZTE MF282Plus";
13 compatible = "zte,mf282plus";
14
15 aliases {
16 led-boot = &led_internal;
17 led-failsafe = &led_internal;
18 led-running = &led_internal;
19 led-upgrade = &led_internal;
20 };
21
22 chosen {
23 /*
24 * bootargs forced by u-boot bootipq command:
25 * 'ubi.mtd=rootfs root=mtd:ubi_rootfs rootfstype=squashfs rootwait'
26 */
27 bootargs-append = " root=/dev/ubiblock0_1";
28 };
29
30 gpio_export {
31 compatible = "gpio-export";
32 #size-cells = <0>;
33
34 modem {
35 gpio-export,name = "modem-reset";
36 gpio-export,output = <0>;
37 gpios = <&tlmm 8 GPIO_ACTIVE_HIGH>;
38 };
39 };
40
41 leds {
42 compatible = "gpio-leds";
43
44 led_internal: led-0 {
45 function = LED_FUNCTION_STATUS;
46 color = <LED_COLOR_ID_BLUE>;
47 gpios = <&tlmm 10 GPIO_ACTIVE_LOW>;
48 label = "blue:internal_led";
49 default-state = "keep";
50 };
51
52 led-1 {
53 function = LED_FUNCTION_WLAN;
54 color = <LED_COLOR_ID_BLUE>;
55 gpios = <&tlmm 61 GPIO_ACTIVE_LOW>;
56 linux,default-trigger = "phy0tpt";
57 };
58 };
59
60 keys {
61 compatible = "gpio-keys";
62
63 wifi {
64 label = "wifi";
65 linux,code = <KEY_RFKILL>;
66 gpios = <&tlmm 11 GPIO_ACTIVE_LOW>;
67 };
68
69 reset {
70 label = "reset";
71 linux,code = <KEY_RESTART>;
72 gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
73 };
74
75 wps {
76 label = "wps";
77 linux,code = <KEY_WPS_BUTTON>;
78 gpios = <&tlmm 68 GPIO_ACTIVE_LOW>;
79 };
80 };
81
82 soc {
83 rng@22000 {
84 status = "okay";
85 };
86
87 mdio@90000 {
88 status = "okay";
89 pinctrl-0 = <&mdio_pins>;
90 pinctrl-names = "default";
91 reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
92 reset-delay-us = <2000>;
93 };
94
95 tcsr@1949000 {
96 compatible = "qcom,tcsr";
97 reg = <0x1949000 0x100>;
98 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
99 };
100
101 tcsr@194b000 {
102 /* select hostmode */
103 compatible = "qcom,tcsr";
104 reg = <0x194b000 0x100>;
105 qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
106 status = "okay";
107 };
108
109 ess_tcsr@1953000 {
110 compatible = "qcom,tcsr";
111 reg = <0x1953000 0x1000>;
112 qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
113 };
114
115 tcsr@1957000 {
116 compatible = "qcom,tcsr";
117 reg = <0x1957000 0x100>;
118 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
119 };
120
121 usb2@60f8800 {
122 status = "okay";
123 };
124
125 usb3@8af8800 {
126 status = "okay";
127 };
128
129 crypto@8e3a000 {
130 status = "okay";
131 };
132
133 watchdog@b017000 {
134 status = "okay";
135 };
136 };
137 };
138
139 &blsp_dma {
140 status = "okay";
141 };
142
143 &blsp1_spi1 {
144 pinctrl-0 = <&spi_0_pins>;
145 pinctrl-names = "default";
146 status = "okay";
147 cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
148
149 flash@0 {
150 /* u-boot is looking for "n25q128a11" property */
151 compatible = "jedec,spi-nor", "n25q128a11";
152 #address-cells = <1>;
153 #size-cells = <1>;
154 reg = <0>;
155 spi-max-frequency = <24000000>;
156
157 partitions {
158 compatible = "fixed-partitions";
159 #address-cells = <1>;
160 #size-cells = <1>;
161
162 partition@0 {
163 label = "0:SBL1";
164 reg = <0x0 0x40000>;
165 read-only;
166 };
167
168 partition@40000 {
169 label = "0:MIBIB";
170 reg = <0x40000 0x20000>;
171 read-only;
172 };
173
174 partition@60000 {
175 label = "0:QSEE";
176 reg = <0x60000 0x60000>;
177 read-only;
178 };
179
180 partition@c0000 {
181 label = "0:CDT";
182 reg = <0xc0000 0x10000>;
183 read-only;
184 };
185
186 partition@d0000 {
187 label = "0:DDRPARAMS";
188 reg = <0xd0000 0x10000>;
189 read-only;
190 };
191
192 partition@e0000 {
193 label = "0:APPSBLENV";
194 reg = <0xe0000 0x10000>;
195 read-only;
196 };
197
198 partition@f0000 {
199 label = "0:APPSBL";
200 reg = <0xf0000 0xc0000>;
201 read-only;
202 };
203
204 partition@1b0000 {
205 label = "0:reserved1";
206 reg = <0x1b0000 0x50000>;
207 read-only;
208 };
209 };
210 };
211 };
212
213 &blsp1_uart1 {
214 pinctrl-0 = <&serial_pins>;
215 pinctrl-names = "default";
216 status = "okay";
217 };
218
219 &cryptobam {
220 status = "okay";
221 };
222
223 &gmac {
224 status = "okay";
225 nvmem-cell-names = "mac-address";
226 nvmem-cells = <&macaddr_config_0 0>;
227 };
228
229 &nand {
230 pinctrl-0 = <&nand_pins>;
231 pinctrl-names = "default";
232 status = "okay";
233
234 nand@0 {
235 partitions {
236 compatible = "fixed-partitions";
237 #address-cells = <1>;
238 #size-cells = <1>;
239
240 partition@0 {
241 label = "fota-flag";
242 reg = <0x0 0xa0000>;
243 read-only;
244 };
245
246 partition@a0000 {
247 label = "ART";
248 reg = <0xa0000 0x80000>;
249 read-only;
250
251 nvmem-layout {
252 compatible = "fixed-layout";
253 #address-cells = <1>;
254 #size-cells = <1>;
255
256 precal_art_1000: precal@1000 {
257 reg = <0x1000 0x2f20>;
258 };
259
260 precal_art_5000: precal@5000 {
261 reg = <0x5000 0x2f20>;
262 };
263 };
264 };
265
266 partition@120000 {
267 label = "mac";
268 reg = <0x120000 0x80000>;
269 read-only;
270
271 nvmem-layout {
272 compatible = "fixed-layout";
273 #address-cells = <1>;
274 #size-cells = <1>;
275
276 macaddr_config_0: macaddr@0 {
277 compatible = "mac-base";
278 reg = <0x0 0x6>;
279 #nvmem-cell-cells = <1>;
280 };
281 };
282 };
283
284 partition@1a0000 {
285 label = "reserved2";
286 reg = <0x1a0000 0xc0000>;
287 read-only;
288 };
289
290 partition@260000 {
291 label = "cfg-param";
292 reg = <0x260000 0x400000>;
293 read-only;
294 };
295
296 partition@660000 {
297 label = "log";
298 reg = <0x660000 0x400000>;
299 };
300
301 partition@a60000 {
302 label = "oops";
303 reg = <0xa60000 0xa0000>;
304 };
305
306 partition@b00000 {
307 label = "reserved3";
308 reg = <0xb00000 0x500000>;
309 read-only;
310 };
311
312 partition@1000000 {
313 label = "web";
314 reg = <0x1000000 0x800000>;
315 };
316
317 partition@1800000 {
318 label = "rootfs";
319 reg = <0x1800000 0x1d00000>;
320 };
321
322 partition@3500000 {
323 label = "data";
324 reg = <0x3500000 0x1900000>;
325 };
326
327 partition@4e00000 {
328 label = "fota";
329 reg = <0x4e00000 0x2800000>;
330 };
331
332 partition@7600000 {
333 label = "extra-cfg";
334 reg = <0x7600000 0xa00000>;
335 };
336 };
337 };
338 };
339
340 &qpic_bam {
341 status = "okay";
342 };
343
344 &switch {
345 status = "okay";
346 };
347
348 &swport4 {
349 status = "okay";
350
351 label = "lan";
352 };
353
354 &tlmm {
355 i2c_0_pins: i2c_0_pinmux {
356 mux {
357 pins = "gpio20", "gpio21";
358 function = "blsp_i2c0";
359 bias-disable;
360 };
361 };
362
363 mdio_pins: mdio_pinmux {
364 mux_1 {
365 pins = "gpio6";
366 function = "mdio";
367 bias-pull-up;
368 };
369
370 mux_2 {
371 pins = "gpio7";
372 function = "mdc";
373 bias-pull-up;
374 };
375 };
376
377 nand_pins: nand_pins {
378 pullups {
379 pins = "gpio52", "gpio53", "gpio58",
380 "gpio59";
381 function = "qpic";
382 bias-pull-up;
383 };
384
385 pulldowns {
386 pins = "gpio54", "gpio55", "gpio56",
387 "gpio57", "gpio60",
388 "gpio62", "gpio63", "gpio64",
389 "gpio65", "gpio66", "gpio67",
390 "gpio69";
391 function = "qpic";
392 bias-pull-down;
393 };
394 };
395
396 serial_pins: serial_pinmux {
397 mux {
398 pins = "gpio16", "gpio17";
399 function = "blsp_uart0";
400 bias-disable;
401 };
402 };
403
404 spi_0_pins: spi_0_pinmux {
405 pinmux {
406 function = "blsp_spi0";
407 pins = "gpio13", "gpio14", "gpio15";
408 drive-strength = <12>;
409 bias-disable;
410 };
411
412 pinmux_cs {
413 function = "gpio";
414 pins = "gpio12";
415 drive-strength = <2>;
416 bias-disable;
417 output-high;
418 };
419 };
420 };
421
422 &usb2_hs_phy {
423 status = "okay";
424 };
425
426 &usb3_ss_phy {
427 status = "okay";
428 };
429
430 &usb3_hs_phy {
431 status = "okay";
432 };
433
434 /*
435 * The MD5 sum of the board file of the MF286D is identical to the board
436 * file in the OEM firmware
437 */
438 &wifi0 {
439 status = "okay";
440 nvmem-cell-names = "pre-calibration", "mac-address";
441 nvmem-cells = <&precal_art_1000>, <&macaddr_config_0 1>;
442 qcom,ath10k-calibration-variant = "zte,mf286d";
443 };
444
445 /*
446 * The MD5 sum of the board file of the MF286D is identical to the board
447 * file in the OEM firmware
448 */
449 &wifi1 {
450 status = "okay";
451 nvmem-cell-names = "pre-calibration", "mac-address";
452 nvmem-cells = <&precal_art_5000>, <&macaddr_config_0 1>;
453 qcom,ath10k-calibration-variant = "zte,mf286d";
454 };