target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ea6350v3.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "qcom-ipq4019.dtsi"
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/input/input.h>
   6 #include <dt-bindings/soc/qcom,tcsr.h>
   7
   8 / {
   9         model = "Linksys EA6350v3";
  10         compatible = "linksys,ea6350v3";
  11
  12         aliases {
  13                 led-boot = &power;
  14                 led-failsafe = &power;
  15                 led-running = &power;
  16                 led-upgrade = &power;
  17         };
  18
  19         soc {
  20                 rng@22000 {
  21                         status = "okay";
  22                 };
  23
  24                 mdio@90000 {
  25                         status = "okay";
  26                 };
  27
  28                 tcsr@1949000 {
  29                         compatible = "qcom,tcsr";
  30                         reg = <0x1949000 0x100>;
  31                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  32                 };
  33
  34                 tcsr@194b000 {
  35                         compatible = "qcom,tcsr";
  36                         reg = <0x194b000 0x100>;
  37                         qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  38                 };
  39
  40                 ess_tcsr@1953000 {
  41                         compatible = "qcom,tcsr";
  42                         reg = <0x1953000 0x1000>;
  43                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  44                 };
  45
  46                 tcsr@1957000 {
  47                         compatible = "qcom,tcsr";
  48                         reg = <0x1957000 0x100>;
  49                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  50                 };
  51
  52                 usb2@60f8800 {
  53                         status = "okay";
  54                 };
  55
  56                 usb3@8af8800 {
  57                         status = "okay";
  58                 };
  59
  60                 crypto@8e3a000 {
  61                         status = "okay";
  62                 };
  63
  64                 watchdog@b017000 {
  65                         status = "okay";
  66                 };
  67         };
  68
  69         keys {
  70                 compatible = "gpio-keys";
  71
  72                 reset {
  73                         label = "reset";
  74                         gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
  75                         linux,code = <KEY_RESTART>;
  76                 };
  77
  78                 wps {
  79                         label = "wps";
  80                         gpios = <&tlmm 0 GPIO_ACTIVE_LOW>;
  81                         linux,code = <KEY_WPS_BUTTON>;
  82                 };
  83         };
  84
  85         leds {
  86                 compatible = "gpio-leds";
  87
  88                 power: status {
  89                         label = "green:status";
  90                         gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
  91                 };
  92         };
  93 };
  94
  95 &blsp1_uart1 {
  96         pinctrl-0 = <&serial_pins>;
  97         pinctrl-names = "default";
  98         status = "okay";
  99 };
 100
 101 &cryptobam {
 102         status = "okay";
 103 };
 104
 105 &wifi0 {
 106         status = "okay";
 107         nvmem-cell-names = "pre-calibration";
 108         nvmem-cells = <&precal_art_1000>;
 109         qcom,ath10k-calibration-variant = "linksys-ea6350v3";
 110 };
 111
 112 &wifi1 {
 113         status = "okay";
 114         nvmem-cell-names = "pre-calibration";
 115         nvmem-cells = <&precal_art_5000>;
 116         qcom,ath10k-calibration-variant = "linksys-ea6350v3";
 117 };
 118
 119 &blsp_dma {
 120         status = "okay";
 121 };
 122
 123 &tlmm {
 124         serial_pins: serial_pinmux {
 125                 mux {
 126                         pins = "gpio60", "gpio61";
 127                         function = "blsp_uart0";
 128                         bias-disable;
 129                 };
 130         };
 131
 132         spi_0_pins: spi_0_pinmux {
 133                 mux {
 134                         function = "blsp_spi0";
 135                         pins = "gpio55", "gpio56", "gpio57";
 136                         drive-strength = <12>;
 137                         bias-disable;
 138                 };
 139
 140                 mux_cs {
 141                         function = "gpio";
 142                         pins = "gpio54", "gpio59";
 143                         drive-strength = <2>;
 144                         bias-disable;
 145                         output-high;
 146                 };
 147         };
 148 };
 149
 150 &blsp1_spi1 { /* BLSP1 QUP1 */
 151         pinctrl-0 = <&spi_0_pins>;
 152         pinctrl-names = "default";
 153         status = "okay";
 154         cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>,
 155                    <&tlmm 59 GPIO_ACTIVE_HIGH>;
 156
 157         flash@0 {
 158                 compatible = "jedec,spi-nor";
 159                 reg = <0>;
 160                 spi-max-frequency = <24000000>;
 161
 162                 partitions {
 163                         compatible = "fixed-partitions";
 164                         #address-cells = <1>;
 165                         #size-cells = <1>;
 166
 167                         SBL1@0 {
 168                                 label = "SBL1";
 169                                 reg = <0x00000000 0x00040000>;
 170                                 read-only;
 171                         };
 172                         MBIB@40000 {
 173                                 label = "MIBIB";
 174                                 reg = <0x00040000 0x00020000>;
 175                                 read-only;
 176                         };
 177                         QSEE@60000 {
 178                                 label = "QSEE";
 179                                 reg = <0x00060000 0x00060000>;
 180                                 read-only;
 181                         };
 182                         CDT@c0000 {
 183                                 label = "CDT";
 184                                 reg = <0x000c0000 0x00010000>;
 185                                 read-only;
 186                         };
 187                         APPSBLENV@d0000 {
 188                                 label = "APPSBLENV";
 189                                 reg = <0x000d0000 0x00010000>;
 190                                 read-only;
 191                         };
 192                         APPSBL@e0000 {
 193                                 label = "APPSBL"; /* uboot */
 194                                 reg = <0x000e0000 0x00080000>;
 195                                 read-only;
 196                         };
 197                         ART@160000 {
 198                                 label = "ART";
 199                                 reg = <0x00160000 0x00010000>;
 200                                 read-only;
 201                                 compatible = "nvmem-cells";
 202                                 #address-cells = <1>;
 203                                 #size-cells = <1>;
 204
 205                                 precal_art_1000: precal@1000 {
 206                                         reg = <0x1000 0x2f20>;
 207                                 };
 208
 209                                 precal_art_5000: precal@5000 {
 210                                         reg = <0x5000 0x2f20>;
 211                                 };
 212                         };
 213                         u_env@170000 {
 214                                 label = "u_env";
 215                                 reg = <0x00170000 0x00020000>;
 216                         };
 217                         s_env@190000 {
 218                                 label = "s_env";
 219                                 reg = <0x00190000 0x00020000>;
 220                         };
 221                         devinfo@1b0000 {
 222                                 label = "devinfo";
 223                                 reg = <0x001b0000 0x00010000>;
 224                         };
 225                         /* 0x001c0000 - 0x00200000 unused */
 226                 };
 227         };
 228
 229         flash@1 {
 230                 status = "okay";
 231                 compatible = "spi-nand";
 232                 reg = <1>;
 233                 spi-max-frequency = <24000000>;
 234
 235                 partitions {
 236                         compatible = "fixed-partitions";
 237                         #address-cells = <1>;
 238                         #size-cells = <1>;
 239
 240                         kernel@0 {
 241                                 label = "kernel";
 242                                 reg = <0x00000000 0x02800000>;
 243                         };
 244                         rootfs@300000 {
 245                                 label = "rootfs";
 246                                 reg = <0x00300000 0x02500000>;
 247                         };
 248                         alt_kernel@2800000 {
 249                                 label = "alt_kernel";
 250                                 reg = <0x02800000 0x02800000>;
 251                         };
 252                         alt_rootfs@2b00000 {
 253                                 label = "alt_rootfs";
 254                                 reg = <0x02b00000 0x02500000>;
 255                         };
 256                         sysdiag@5000000 {
 257                                 label = "sysdiag";
 258                                 reg = <0x05000000 0x00100000>;
 259                         };
 260                         syscfg@5100000 {
 261                                 label = "syscfg";
 262                                 reg = <0x05100000 0x02F00000>;
 263                         };
 264                         /* 0x00000000 - 0x08000000: 128 MiB */
 265                 };
 266         };
 267 };
 268
 269 &usb3_ss_phy {
 270         status = "okay";
 271 };
 272
 273 &usb3_hs_phy {
 274         status = "okay";
 275 };
 276
 277 &usb2_hs_phy {
 278         status = "okay";
 279 };