target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-oap100.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "qcom-ipq4019.dtsi"
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/input/input.h>
   6 #include <dt-bindings/soc/qcom,tcsr.h>
   7
   8 / {
   9         model = "EdgeCore OAP-100";
  10         compatible = "edgecore,oap100";
  11
  12         aliases {
  13                 led-boot = &led_system;
  14                 led-failsafe = &led_system;
  15                 led-running = &led_system;
  16                 led-upgrade = &led_system;
  17         };
  18
  19         chosen {
  20                 bootargs-append = " root=/dev/ubiblock0_1";
  21         };
  22
  23         soc {
  24                 mdio@90000 {
  25                         status = "okay";
  26                         pinctrl-0 = <&mdio_pins>;
  27                         pinctrl-names = "default";
  28                 };
  29
  30                 ess-psgmii@98000 {
  31                         status = "okay";
  32                 };
  33
  34                 tcsr@1949000 {
  35                         compatible = "qcom,tcsr";
  36                         reg = <0x1949000 0x100>;
  37                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  38                 };
  39
  40                 ess_tcsr@1953000 {
  41                         compatible = "qcom,tcsr";
  42                         reg = <0x1953000 0x1000>;
  43                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  44                 };
  45
  46                 tcsr@1957000 {
  47                         compatible = "qcom,tcsr";
  48                         reg = <0x1957000 0x100>;
  49                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  50                 };
  51
  52                 tcsr@194b000 {
  53                         /* select hostmode */
  54                         compatible = "qcom,tcsr";
  55                         reg = <0x194b000 0x100>;
  56                         qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  57                         status = "okay";
  58                 };
  59
  60                 usb2@60f8800 {
  61                         status = "okay";
  62
  63                         dwc3@6000000 {
  64                                 #address-cells = <1>;
  65                                 #size-cells = <0>;
  66
  67                                 usb2_port1: port@1 {
  68                                         reg = <1>;
  69                                         #trigger-source-cells = <0>;
  70                                 };
  71                         };
  72                 };
  73
  74                 usb3@8af8800 {
  75                         status = "okay";
  76
  77                         dwc3@8a00000 {
  78                                 #address-cells = <1>;
  79                                 #size-cells = <0>;
  80
  81                                 usb3_port1: port@1 {
  82                                         reg = <1>;
  83                                         #trigger-source-cells = <0>;
  84                                 };
  85
  86                                 usb3_port2: port@2 {
  87                                         reg = <2>;
  88                                         #trigger-source-cells = <0>;
  89                                 };
  90                         };
  91                 };
  92
  93                 crypto@8e3a000 {
  94                         status = "okay";
  95                 };
  96
  97                 watchdog@b017000 {
  98                         status = "okay";
  99                 };
 100
 101                 ess-switch@c000000 {
 102                         status = "okay";
 103                         switch_mac_mode = <0x0>; /* mac mode for RGMII RMII */
 104                         switch_initvlas = <0x0007c 0x54>; /* port0 status */
 105                         switch_lan_bmp = <0x10>;
 106                 };
 107
 108                 edma@c080000 {
 109                         status = "okay";
 110                 };
 111         };
 112
 113         key {
 114                 compatible = "gpio-keys";
 115
 116                 button@1 {
 117                         label = "reset";
 118                         linux,code = <KEY_RESTART>;
 119                         gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
 120                         linux,input-type = <1>;
 121                 };
 122         };
 123
 124         leds {
 125                 compatible = "gpio-leds";
 126
 127                 led_system: led_system {
 128                         label = "green:system";
 129                         gpios = <&tlmm 22 GPIO_ACTIVE_HIGH>;
 130                 };
 131
 132                 led_2g {
 133                         label = "blue:wlan2g";
 134                         gpios = <&tlmm 34 GPIO_ACTIVE_HIGH>;
 135                 };
 136
 137                 led_5g {
 138                         label = "blue:wlan5g";
 139                         gpios = <&tlmm 35 GPIO_ACTIVE_HIGH>;
 140                 };
 141         };
 142
 143         gpio_export {
 144                 compatible = "gpio-export";
 145                 #size-cells = <0>;
 146
 147                 usb {
 148                         gpio-export,name = "usb-power";
 149                         gpio-export,output = <1>;
 150                         gpios = <&tlmm 44 GPIO_ACTIVE_HIGH>;
 151                 };
 152
 153                 poe {
 154                         gpio-export,name = "poe-power";
 155                         gpio-export,output = <0>;
 156                         gpios = <&tlmm 45 GPIO_ACTIVE_HIGH>;
 157                 };
 158         };
 159 };
 160
 161 &tlmm {
 162         serial_0_pins: serial_pinmux {
 163                 mux {
 164                         pins = "gpio16", "gpio17";
 165                         function = "blsp_uart0";
 166                         bias-disable;
 167                 };
 168         };
 169
 170         spi_0_pins: spi_0_pinmux {
 171                 pinmux {
 172                         function = "blsp_spi0";
 173                         pins = "gpio13", "gpio14", "gpio15";
 174                         drive-strength = <12>;
 175                         bias-disable;
 176                 };
 177
 178                 pinmux_cs {
 179                         function = "gpio";
 180                         pins = "gpio12";
 181                         drive-strength = <2>;
 182                         bias-disable;
 183                         output-high;
 184                 };
 185         };
 186
 187         nand_pins: nand_pins {
 188                 pullups {
 189                         pins = "gpio53", "gpio58", "gpio59";
 190                         function = "qpic";
 191                         bias-pull-up;
 192                 };
 193
 194                 pulldowns {
 195                         pins = "gpio54", "gpio55", "gpio56",
 196                                 "gpio57", "gpio60", "gpio61",
 197                                 "gpio62", "gpio63", "gpio64",
 198                                 "gpio65", "gpio66", "gpio67",
 199                                 "gpio68", "gpio69";
 200                         function = "qpic";
 201                         bias-pull-down;
 202                 };
 203         };
 204
 205         mdio_pins: mdio_pinmux {
 206                 mux_1 {
 207                         pins = "gpio6";
 208                         function = "mdio";
 209                         bias-pull-up;
 210                 };
 211                 mux_2 {
 212                         pins = "gpio7";
 213                         function = "mdc";
 214                         bias-pull-up;
 215                 };
 216         };
 217 };
 218
 219 &cryptobam {
 220         status = "okay";
 221 };
 222
 223 &blsp1_spi1 {
 224         pinctrl-0 = <&spi_0_pins>;
 225         pinctrl-names = "default";
 226         status = "okay";
 227         cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
 228
 229         flash@0 {
 230                 #address-cells = <1>;
 231                 #size-cells = <1>;
 232                 compatible = "jedec,spi-nor";
 233                 reg = <0>;
 234                 linux,modalias = "m25p80", "gd25q256";
 235                 spi-max-frequency = <24000000>;
 236
 237                 partitions {
 238                         compatible = "fixed-partitions";
 239                         #address-cells = <1>;
 240                         #size-cells = <1>;
 241
 242                         partition0@0 {
 243                                 label = "0:SBL1";
 244                                 reg = <0x00000000 0x00040000>;
 245                                 read-only;
 246                         };
 247                         partition1@40000 {
 248                                 label = "0:MIBIB";
 249                                 reg = <0x00040000 0x00020000>;
 250                                 read-only;
 251                         };
 252                         partition2@60000 {
 253                                 label = "0:QSEE";
 254                                 reg = <0x00060000 0x00060000>;
 255                                 read-only;
 256                         };
 257                         partition3@c0000 {
 258                                 label = "0:CDT";
 259                                 reg = <0x000c0000 0x00010000>;
 260                                 read-only;
 261                         };
 262                         partition4@d0000 {
 263                                 label = "0:DDRPARAMS";
 264                                 reg = <0x000d0000 0x00010000>;
 265                                 read-only;
 266                         };
 267                         partition5@e0000 {
 268                                 label = "0:APPSBLENV";
 269                                 reg = <0x000e0000 0x00010000>;
 270                                 read-only;
 271                         };
 272                         partition6@f0000 {
 273                                 label = "0:APPSBL";
 274                                 reg = <0x000f0000 0x00080000>;
 275                                 read-only;
 276                         };
 277                         partition7@170000 {
 278                                 label = "0:ART";
 279                                 reg = <0x00170000 0x00010000>;
 280                                 read-only;
 281                                 compatible = "nvmem-cells";
 282                                 #address-cells = <1>;
 283                                 #size-cells = <1>;
 284
 285                                 precal_art_1000: precal@1000 {
 286                                         reg = <0x1000 0x2f20>;
 287                                 };
 288
 289                                 precal_art_5000: precal@5000 {
 290                                         reg = <0x5000 0x2f20>;
 291                                 };
 292                         };
 293                 };
 294         };
 295 };
 296
 297 &nand {
 298         pinctrl-0 = <&nand_pins>;
 299         pinctrl-names = "default";
 300         status = "okay";
 301
 302         nand@0 {
 303                 partitions {
 304                         compatible = "fixed-partitions";
 305                         #address-cells = <1>;
 306                         #size-cells = <1>;
 307
 308                         partition@0 {
 309                                 label = "rootfs";
 310                                 reg = <0x00000000 0x4000000>;
 311                         };
 312                 };
 313         };
 314 };
 315
 316 &blsp_dma {
 317         status = "okay";
 318 };
 319
 320 &blsp1_uart1 {
 321         pinctrl-0 = <&serial_0_pins>;
 322         pinctrl-names = "default";
 323         status = "okay";
 324 };
 325
 326 &qpic_bam {
 327         status = "okay";
 328 };
 329
 330 &wifi0 {
 331         status = "okay";
 332         nvmem-cell-names = "pre-calibration";
 333         nvmem-cells = <&precal_art_1000>;
 334         qcom,ath10k-calibration-variant = "Edgecore OAP100";
 335 };
 336
 337 &wifi1 {
 338         status = "okay";
 339         nvmem-cell-names = "pre-calibration";
 340         nvmem-cells = <&precal_art_5000>;
 341         qcom,ath10k-calibration-variant = "Edgecore OAP100";
 342 };
 343
 344 &usb3_ss_phy {
 345         status = "okay";
 346 };
 347
 348 &usb3_hs_phy {
 349         status = "okay";
 350 };
 351
 352 &usb2_hs_phy {
 353         status = "okay";
 354 };