ipq806x: split files in 6.1 and 6.6 dedicated directory
[openwrt/openwrt.git] / target / linux / ipq806x / files-6.1 / arch / arm / boot / dts / qcom-ipq8064-eax500.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "qcom-ipq8064-v2.0-smb208.dtsi"
4
5 #include <dt-bindings/input/input.h>
6
7 / {
8 chosen {
9 bootargs = "console=ttyMSM0,115200n8";
10 /* append to bootargs adding the root deviceblock nbr from bootloader */
11 append-rootblock = "ubi.mtd=";
12 };
13 };
14
15 &qcom_pinmux {
16 /* eax500 routers reuse the pcie2 reset pin for switch reset pin */
17 switch_reset: switch_reset_pins {
18 mux {
19 pins = "gpio63";
20 function = "gpio";
21 drive-strength = <12>;
22 bias-pull-up;
23 };
24 };
25 };
26
27 &hs_phy_0 {
28 status = "okay";
29 };
30
31 &ss_phy_0 {
32 status = "okay";
33 };
34
35 &usb3_0 {
36 status = "okay";
37 };
38
39 &hs_phy_1 {
40 status = "okay";
41 };
42
43 &ss_phy_1 {
44 status = "okay";
45 };
46
47 &usb3_1 {
48 status = "okay";
49 };
50
51 &pcie0 {
52 status = "okay";
53
54 max-link-speed = <1>;
55 };
56
57 &pcie1 {
58 status = "okay";
59 };
60
61 &nand {
62 status = "okay";
63
64 nand@0 {
65 reg = <0>;
66 compatible = "qcom,nandcs";
67
68 nand-ecc-strength = <4>;
69 nand-bus-width = <8>;
70 nand-ecc-step-size = <512>;
71
72 nand-is-boot-medium;
73 qcom,boot-partitions = <0x0 0x0c80000>;
74
75 partitions: partitions {
76 compatible = "fixed-partitions";
77 #address-cells = <1>;
78 #size-cells = <1>;
79
80 partition@0 {
81 label = "SBL1";
82 reg = <0x0000000 0x0040000>;
83 read-only;
84 };
85
86 partition@40000 {
87 label = "MIBIB";
88 reg = <0x0040000 0x0140000>;
89 read-only;
90 };
91
92 partition@180000 {
93 label = "SBL2";
94 reg = <0x0180000 0x0140000>;
95 read-only;
96 };
97
98 partition@2c0000 {
99 label = "SBL3";
100 reg = <0x02c0000 0x0280000>;
101 read-only;
102 };
103
104 partition@540000 {
105 label = "DDRCONFIG";
106 reg = <0x0540000 0x0120000>;
107 read-only;
108 };
109
110 partition@660000 {
111 label = "SSD";
112 reg = <0x0660000 0x0120000>;
113 read-only;
114 };
115
116 partition@780000 {
117 label = "TZ";
118 reg = <0x0780000 0x0280000>;
119 read-only;
120 };
121
122 partition@a00000 {
123 label = "RPM";
124 reg = <0x0a00000 0x0280000>;
125 read-only;
126 };
127
128 art: partition@c80000 {
129 label = "art";
130 reg = <0x0c80000 0x0140000>;
131 read-only;
132 };
133
134 partition@dc0000 {
135 label = "APPSBL";
136 reg = <0x0dc0000 0x0100000>;
137 read-only;
138 };
139
140 partition@ec0000 {
141 label = "u_env";
142 reg = <0x0ec0000 0x0040000>;
143 };
144
145 partition@f00000 {
146 label = "s_env";
147 reg = <0x0f00000 0x0040000>;
148 };
149
150 partition@f40000 {
151 label = "devinfo";
152 reg = <0x0f40000 0x0040000>;
153 };
154
155 partition@f80000 {
156 label = "kernel1";
157 reg = <0x0f80000 0x2800000>; /* 4 MB, spill to rootfs */
158 };
159
160 partition@1380000 {
161 label = "rootfs1";
162 reg = <0x1380000 0x2400000>;
163 };
164
165 partition@3780000 {
166 label = "kernel2";
167 reg = <0x3780000 0x2800000>;
168 };
169
170 partition@3b80000 {
171 label = "rootfs2";
172 reg = <0x3b80000 0x2400000>;
173 };
174 };
175 };
176 };
177
178 &mdio0 {
179 status = "okay";
180
181 pinctrl-0 = <&mdio0_pins>;
182 pinctrl-names = "default";
183
184 /* Switch from documentation require at least 10ms for reset */
185 reset-gpios = <&qcom_pinmux 63 GPIO_ACTIVE_HIGH>;
186 reset-post-delay-us = <12000>;
187
188 switch@10 {
189 compatible = "qca,qca8337";
190 #address-cells = <1>;
191 #size-cells = <0>;
192 reg = <0x10>;
193
194 ports {
195 #address-cells = <1>;
196 #size-cells = <0>;
197
198 port@0 {
199 reg = <0>;
200 label = "cpu";
201 ethernet = <&gmac1>;
202 phy-mode = "rgmii";
203 tx-internal-delay-ps = <1000>;
204 rx-internal-delay-ps = <1000>;
205
206 fixed-link {
207 speed = <1000>;
208 full-duplex;
209 };
210 };
211
212 port@1 {
213 reg = <1>;
214 label = "lan1";
215 phy-mode = "internal";
216 phy-handle = <&phy_port1>;
217 };
218
219 port@2 {
220 reg = <2>;
221 label = "lan2";
222 phy-mode = "internal";
223 phy-handle = <&phy_port2>;
224 };
225
226 port@3 {
227 reg = <3>;
228 label = "lan3";
229 phy-mode = "internal";
230 phy-handle = <&phy_port3>;
231 };
232
233 port@4 {
234 reg = <4>;
235 label = "lan4";
236 phy-mode = "internal";
237 phy-handle = <&phy_port4>;
238 };
239
240 port@5 {
241 reg = <5>;
242 label = "wan";
243 phy-mode = "internal";
244 phy-handle = <&phy_port5>;
245 };
246
247 port@6 {
248 reg = <6>;
249 label = "cpu";
250 ethernet = <&gmac2>;
251 phy-mode = "sgmii";
252 qca,sgmii-enable-pll;
253
254 fixed-link {
255 speed = <1000>;
256 full-duplex;
257 };
258 };
259 };
260
261 mdio {
262 #address-cells = <1>;
263 #size-cells = <0>;
264
265 phy_port1: phy@0 {
266 reg = <0>;
267 };
268
269 phy_port2: phy@1 {
270 reg = <1>;
271 };
272
273 phy_port3: phy@2 {
274 reg = <2>;
275 };
276
277 phy_port4: phy@3 {
278 reg = <3>;
279 };
280
281 phy_port5: phy@4 {
282 reg = <4>;
283 };
284 };
285 };
286 };
287
288 &gmac1 {
289 status = "okay";
290
291 phy-mode = "rgmii";
292 qcom,id = <1>;
293
294 pinctrl-0 = <&rgmii2_pins>;
295 pinctrl-names = "default";
296
297 fixed-link {
298 speed = <1000>;
299 full-duplex;
300 };
301 };
302
303 &gmac2 {
304 status = "okay";
305
306 phy-mode = "sgmii";
307 qcom,id = <2>;
308
309 fixed-link {
310 speed = <1000>;
311 full-duplex;
312 };
313 };
314
315 &adm_dma {
316 status = "okay";
317 };