ipq806x: rename kernel files to generic name
[openwrt/openwrt.git] / target / linux / ipq806x / files / arch / arm / boot / dts / qcom-ipq8068-ecw5410.dts
1 #include "qcom-ipq8064-v2.0-smb208.dtsi"
2
3 #include <dt-bindings/input/input.h>
4 #include <dt-bindings/soc/qcom,tcsr.h>
5
6 / {
7 model = "Edgecore ECW5410";
8 compatible = "edgecore,ecw5410", "qcom,ipq8064";
9
10 reserved-memory {
11 nss@40000000 {
12 reg = <0x40000000 0x1000000>;
13 no-map;
14 };
15
16 smem: smem@41000000 {
17 reg = <0x41000000 0x200000>;
18 no-map;
19 };
20
21 wifi_dump@44000000 {
22 reg = <0x44000000 0x600000>;
23 no-map;
24 };
25 };
26
27 cpus {
28 idle-states {
29 CPU_SPC: spc {
30 status = "disabled";
31 };
32 };
33 };
34
35 aliases {
36 serial1 = &gsbi1_serial;
37 ethernet0 = &gmac2;
38 ethernet1 = &gmac3;
39
40 led-boot = &led_power_green;
41 led-failsafe = &led_power_red;
42 led-running = &led_power_green;
43 led-upgrade = &led_power_green;
44 };
45
46 chosen {
47 bootargs-append = " console=ttyMSM0,115200n8 root=/dev/ubiblock0_1";
48 };
49
50 keys {
51 compatible = "gpio-keys";
52 pinctrl-0 = <&button_pins>;
53 pinctrl-names = "default";
54
55 reset {
56 label = "reset";
57 gpios = <&qcom_pinmux 25 GPIO_ACTIVE_LOW>;
58 linux,code = <KEY_RESTART>;
59 debounce-interval = <60>;
60 wakeup-source;
61 };
62 };
63
64 leds {
65 compatible = "gpio-leds";
66 pinctrl-0 = <&led_pins>;
67 pinctrl-names = "default";
68
69 led_power_green: power_green {
70 label = "green:power";
71 gpios = <&qcom_pinmux 16 GPIO_ACTIVE_HIGH>;
72 };
73
74 wlan2g_green {
75 label = "green:wlan2g";
76 gpios = <&qcom_pinmux 23 GPIO_ACTIVE_LOW>;
77 };
78
79 wlan2g_yellow {
80 label = "yellow:wlan2g";
81 gpios = <&qcom_pinmux 24 GPIO_ACTIVE_LOW>;
82 };
83
84 wlan5g_green {
85 label = "green:wlan5g";
86 gpios = <&qcom_pinmux 26 GPIO_ACTIVE_LOW>;
87 };
88
89 led_power_red: power_red {
90 label = "red:power";
91 gpios = <&qcom_pinmux 28 GPIO_ACTIVE_LOW>;
92 };
93
94 wlan5g_yellow {
95 label = "yellow:wlan5g";
96 gpios = <&qcom_pinmux 59 GPIO_ACTIVE_LOW>;
97 };
98 };
99 };
100
101
102 &qcom_pinmux {
103 spi_pins: spi_pins {
104 mux {
105 pins = "gpio18", "gpio19";
106 function = "gsbi5";
107 drive-strength = <10>;
108 bias-pull-down;
109 };
110
111 clk {
112 pins = "gpio21";
113 function = "gsbi5";
114 drive-strength = <12>;
115 bias-pull-down;
116 };
117
118 cs {
119 pins = "gpio20";
120 function = "gpio";
121 drive-strength = <10>;
122 bias-pull-up;
123 };
124 };
125
126 led_pins: led_pins {
127 mux {
128 pins = "gpio16", "gpio23", "gpio24", "gpio26",
129 "gpio28", "gpio59";
130 function = "gpio";
131 drive-strength = <2>;
132 bias-pull-up;
133 };
134 };
135
136 button_pins: button_pins {
137 mux {
138 pins = "gpio25";
139 function = "gpio";
140 drive-strength = <2>;
141 bias-pull-up;
142 };
143 };
144
145 uart1_pins: uart1_pins {
146 mux {
147 pins = "gpio51", "gpio52", "gpio53", "gpio54";
148 function = "gsbi1";
149 drive-strength = <12>;
150 bias-none;
151 };
152 };
153 };
154
155 &gsbi1 {
156 qcom,mode = <GSBI_PROT_UART_W_FC>;
157 status = "okay";
158
159 serial@12450000 {
160 status = "okay";
161
162 pinctrl-0 = <&uart1_pins>;
163 pinctrl-names = "default";
164 };
165 };
166
167 &gsbi5 {
168 qcom,mode = <GSBI_PROT_SPI>;
169 status = "okay";
170
171 spi4: spi@1a280000 {
172 status = "okay";
173 spi-max-frequency = <50000000>;
174
175 pinctrl-0 = <&spi_pins>;
176 pinctrl-names = "default";
177
178 cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
179
180 m25p80@0 {
181 compatible = "jedec,spi-nor";
182 #address-cells = <1>;
183 #size-cells = <1>;
184 spi-max-frequency = <50000000>;
185 reg = <0>;
186
187 partitions {
188 compatible = "qcom,smem-part";
189 };
190 };
191 };
192 };
193
194 &hs_phy_0 {
195 status = "okay";
196 };
197
198 &ss_phy_0 {
199 status = "okay";
200 };
201
202 &usb3_0 {
203 status = "okay";
204 };
205
206 &hs_phy_1 {
207 status = "okay";
208 };
209
210 &ss_phy_1 {
211 status = "okay";
212 };
213
214 &usb3_1 {
215 status = "okay";
216 };
217
218 &pcie1 {
219 status = "okay";
220
221 /delete-property/ pinctrl-0;
222 /delete-property/ pinctrl-names;
223 /delete-property/ perst-gpios;
224
225 bridge@0,0 {
226 reg = <0x00000000 0 0 0 0>;
227 #address-cells = <3>;
228 #size-cells = <2>;
229 ranges;
230
231 wifi@1,0 {
232 compatible = "qcom,ath10k";
233 status = "okay";
234 reg = <0x00010000 0 0 0 0>;
235 qcom,ath10k-calibration-variant = "Edgecore-ECW5410-L";
236 };
237 };
238 };
239
240 &pcie2 {
241 status = "okay";
242
243 /delete-property/ pinctrl-0;
244 /delete-property/ pinctrl-names;
245 /delete-property/ perst-gpios;
246
247 bridge@0,0 {
248 reg = <0x00000000 0 0 0 0>;
249 #address-cells = <3>;
250 #size-cells = <2>;
251 ranges;
252
253 wifi@1,0 {
254 compatible = "qcom,ath10k";
255 status = "okay";
256 reg = <0x00010000 0 0 0 0>;
257 qcom,ath10k-calibration-variant = "Edgecore-ECW5410-L";
258 };
259 };
260 };
261
262 &nand {
263 status = "okay";
264
265 nand@0 {
266 compatible = "qcom,nandcs";
267
268 reg = <0>;
269
270 nand-ecc-strength = <4>;
271 nand-bus-width = <8>;
272 nand-ecc-step-size = <512>;
273
274 partitions {
275 compatible = "fixed-partitions";
276 #address-cells = <1>;
277 #size-cells = <1>;
278
279 rootfs1@0 {
280 label = "rootfs1";
281 reg = <0x0000000 0x4000000>;
282 };
283
284 rootfs2@4000000 {
285 label = "rootfs2";
286 reg = <0x4000000 0x4000000>;
287 };
288 };
289 };
290 };
291
292 &mdio0 {
293 status = "okay";
294
295 pinctrl-0 = <&mdio0_pins>;
296 pinctrl-names = "default";
297
298 phy0: ethernet-phy@0 {
299 reg = <0>;
300 };
301
302 phy1: ethernet-phy@1 {
303 reg = <1>;
304 };
305 };
306
307 &gmac2 {
308 status = "okay";
309
310 qcom,id = <2>;
311 mdiobus = <&mdio0>;
312
313 phy-mode = "sgmii";
314 phy-handle = <&phy1>;
315 };
316
317 &gmac3 {
318 status = "okay";
319
320 qcom,id = <3>;
321 mdiobus = <&mdio0>;
322
323 phy-mode = "sgmii";
324 phy-handle = <&phy0>;
325 };
326
327 &adm_dma {
328 status = "okay";
329 };