target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-ecw5410.dts

   1 #include "qcom-ipq8064-v2.0.dtsi"
   2
   3 #include <dt-bindings/input/input.h>
   4 #include <dt-bindings/soc/qcom,tcsr.h>
   5
   6 / {
   7         model = "Edgecore ECW5410";
   8         compatible = "edgecore,ecw5410", "qcom,ipq8064";
   9
  10         reserved-memory {
  11                 nss@40000000 {
  12                         reg = <0x40000000 0x1000000>;
  13                         no-map;
  14                 };
  15
  16                 smem: smem@41000000 {
  17                         reg = <0x41000000 0x200000>;
  18                         no-map;
  19                 };
  20
  21                 wifi_dump@44000000 {
  22                         reg = <0x44000000 0x600000>;
  23                         no-map;
  24                 };
  25         };
  26
  27         cpus {
  28                 idle-states {
  29                         CPU_SPC: spc {
  30                                 status = "disabled";
  31                         };
  32                 };
  33         };
  34
  35         aliases {
  36                 serial1 = &gsbi1_serial;
  37                 mdio-gpio0 = &mdio0;
  38                 ethernet0 = &gmac3;
  39                 ethernet1 = &gmac2;
  40
  41                 led-boot = &led_power_green;
  42                 led-failsafe = &led_power_red;
  43                 led-running = &led_power_green;
  44                 led-upgrade = &led_power_green;
  45         };
  46
  47         chosen {
  48                 bootargs-append = " console=ttyMSM0,115200n8 root=/dev/ubiblock0_1";
  49         };
  50
  51         keys {
  52                 compatible = "gpio-keys";
  53                 pinctrl-0 = <&button_pins>;
  54                 pinctrl-names = "default";
  55
  56                 reset {
  57                         label = "reset";
  58                         gpios = <&qcom_pinmux 25 GPIO_ACTIVE_LOW>;
  59                         linux,code = <KEY_RESTART>;
  60                 };
  61         };
  62
  63         leds {
  64                 compatible = "gpio-leds";
  65                 pinctrl-0 = <&led_pins>;
  66                 pinctrl-names = "default";
  67
  68                 led_power_green: power_green {
  69                         label = "green:power";
  70                         gpios = <&qcom_pinmux 16 GPIO_ACTIVE_HIGH>;
  71                 };
  72
  73                 wlan2g_green {
  74                         label = "green:wlan2g";
  75                         gpios = <&qcom_pinmux 23 GPIO_ACTIVE_LOW>;
  76                 };
  77
  78                 wlan2g_yellow {
  79                         label = "yellow:wlan2g";
  80                         gpios = <&qcom_pinmux 24 GPIO_ACTIVE_LOW>;
  81                 };
  82
  83                 wlan5g_green {
  84                         label = "green:wlan5g";
  85                         gpios = <&qcom_pinmux 26 GPIO_ACTIVE_LOW>;
  86                 };
  87
  88                 led_power_red: power_red {
  89                         label = "red:power";
  90                         gpios = <&qcom_pinmux 28 GPIO_ACTIVE_LOW>;
  91                 };
  92
  93                 wlan5g_yellow {
  94                         label = "yellow:wlan5g";
  95                         gpios = <&qcom_pinmux 59 GPIO_ACTIVE_LOW>;
  96                 };
  97         };
  98 };
  99
 100
 101 &qcom_pinmux {
 102         spi_pins: spi_pins {
 103                 mux {
 104                         pins = "gpio18", "gpio19";
 105                         function = "gsbi5";
 106                         drive-strength = <10>;
 107                         bias-pull-down;
 108                 };
 109
 110                 clk {
 111                         pins = "gpio21";
 112                         function = "gsbi5";
 113                         drive-strength = <12>;
 114                         bias-pull-down;
 115                 };
 116
 117                 cs {
 118                         pins = "gpio20";
 119                         function = "gpio";
 120                         drive-strength = <10>;
 121                         bias-pull-up;
 122                 };
 123         };
 124
 125         led_pins: led_pins {
 126                 mux {
 127                         pins = "gpio16", "gpio23", "gpio24", "gpio26",
 128                                    "gpio28", "gpio59";
 129                         function = "gpio";
 130                         drive-strength = <2>;
 131                         bias-pull-up;
 132                 };
 133         };
 134
 135         button_pins: button_pins {
 136                 mux {
 137                         pins = "gpio25";
 138                         function = "gpio";
 139                         drive-strength = <2>;
 140                         bias-pull-up;
 141                 };
 142         };
 143
 144         uart1_pins: uart1_pins {
 145                 mux {
 146                         pins = "gpio51", "gpio52", "gpio53", "gpio54";
 147                         function = "gsbi1";
 148                         drive-strength = <12>;
 149                         bias-none;
 150                 };
 151         };
 152 };
 153
 154 &gsbi1 {
 155         qcom,mode = <GSBI_PROT_UART_W_FC>;
 156         status = "okay";
 157
 158         serial@12450000 {
 159                 status = "okay";
 160
 161                 pinctrl-0 = <&uart1_pins>;
 162                 pinctrl-names = "default";
 163         };
 164 };
 165
 166 &gsbi5 {
 167         qcom,mode = <GSBI_PROT_SPI>;
 168         status = "okay";
 169
 170         spi4: spi@1a280000 {
 171                 status = "okay";
 172                 spi-max-frequency = <50000000>;
 173
 174                 pinctrl-0 = <&spi_pins>;
 175                 pinctrl-names = "default";
 176
 177                 cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
 178
 179                 m25p80@0 {
 180                         compatible = "jedec,spi-nor";
 181                         #address-cells = <1>;
 182                         #size-cells = <1>;
 183                         spi-max-frequency = <50000000>;
 184                         reg = <0>;
 185
 186                         partitions {
 187                                 compatible = "qcom,smem";
 188                         };
 189                 };
 190         };
 191 };
 192
 193 &hs_phy_0 {             /* USB3 port 0 HS phy */
 194         status = "okay";
 195 };
 196
 197 &hs_phy_1 {             /* USB3 port 1 HS phy */
 198         status = "okay";
 199 };
 200
 201 &ss_phy_0 {             /* USB3 port 0 SS phy */
 202         status = "okay";
 203 };
 204
 205 &ss_phy_1 {             /* USB3 port 1 SS phy */
 206         status = "okay";
 207 };
 208
 209 &usb3_0 {
 210         status = "okay";
 211 };
 212
 213 &usb3_1 {
 214         status = "okay";
 215 };
 216
 217 &pcie1 {
 218         status = "okay";
 219
 220         /delete-property/ pinctrl-0;
 221         /delete-property/ pinctrl-names;
 222         /delete-property/ perst-gpios;
 223
 224         bridge@0,0 {
 225                 reg = <0x00000000 0 0 0 0>;
 226                 #address-cells = <3>;
 227                 #size-cells = <2>;
 228                 ranges;
 229
 230                 wifi@1,0 {
 231                         compatible = "qcom,ath10k";
 232                         status = "okay";
 233                         reg = <0x00010000 0 0 0 0>;
 234                         qcom,ath10k-calibration-variant = "Edgecore-ECW5410-L";
 235                 };
 236         };
 237 };
 238
 239 &pcie2 {
 240         status = "okay";
 241
 242         /delete-property/ pinctrl-0;
 243         /delete-property/ pinctrl-names;
 244         /delete-property/ perst-gpios;
 245
 246         bridge@0,0 {
 247                 reg = <0x00000000 0 0 0 0>;
 248                 #address-cells = <3>;
 249                 #size-cells = <2>;
 250                 ranges;
 251
 252                 wifi@1,0 {
 253                         compatible = "qcom,ath10k";
 254                         status = "okay";
 255                         reg = <0x00010000 0 0 0 0>;
 256                         qcom,ath10k-calibration-variant = "Edgecore-ECW5410-L";
 257                 };
 258         };
 259 };
 260
 261 &soc {
 262         nand@1ac00000 {
 263                 status = "okay";
 264
 265                 pinctrl-0 = <&nand_pins>;
 266                 pinctrl-names = "default";
 267
 268                 nand@0 {
 269                         compatible = "qcom,nandcs";
 270
 271                         reg = <0>;
 272
 273                         nand-ecc-strength = <4>;
 274                         nand-bus-width = <8>;
 275                         nand-ecc-step-size = <512>;
 276
 277                         partitions {
 278                                 compatible = "fixed-partitions";
 279                                 #address-cells = <1>;
 280                                 #size-cells = <1>;
 281
 282                                 rootfs1@0 {
 283                                         label = "rootfs1";
 284                                         reg = <0x0000000 0x4000000>;
 285                                 };
 286
 287                                 rootfs2@4000000 {
 288                                         label = "rootfs2";
 289                                         reg = <0x4000000 0x4000000>;
 290                                 };
 291                         };
 292                 };
 293         };
 294
 295         mdio1: mdio {
 296                 compatible = "virtual,mdio-gpio";
 297                 #address-cells = <1>;
 298                 #size-cells = <0>;
 299
 300                 status = "okay";
 301
 302                 pinctrl-0 = <&mdio0_pins>;
 303                 pinctrl-names = "default";
 304
 305                 gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
 306
 307                 phy0: ethernet-phy@0 {
 308                         reg = <0>;
 309                 };
 310
 311                 phy1: ethernet-phy@1 {
 312                         reg = <1>;
 313                 };
 314         };
 315 };
 316
 317 &gmac2 {
 318         status = "okay";
 319
 320         qcom,id = <2>;
 321         mdiobus = <&mdio0>;
 322
 323         phy-mode = "sgmii";
 324         phy-handle = <&phy1>;
 325 };
 326
 327 &gmac3 {
 328         status = "okay";
 329
 330         qcom,id = <3>;
 331         mdiobus = <&mdio1>;
 332
 333         phy-mode = "sgmii";
 334         phy-handle = <&phy0>;
 335 };
 336
 337 &adm_dma {
 338         status = "okay";
 339 };